mc68hc908qb4 Freescale Semiconductor, Inc, mc68hc908qb4 Datasheet - Page 124

• Manufacturer Part Number: mc68hc908qb4
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Enhanced Serial Communications Interface (ESCI) Module
SCTIE — ESCI Transmit Interrupt Enable Bit
TCIE — Transmission Complete Interrupt Enable Bit
SCRIE — ESCI Receive Interrupt Enable Bit
ILIE — Idle Line Interrupt Enable Bit
TE — Transmitter Enable Bit
RE — Receiver Enable Bit
124
•
•
•
This read/write bit enables the SCTE bit to generate ESCI transmitter interrupt requests. Setting the
SCTIE bit in SCC2 enables the SCTE bit to generate interrupt requests.
This read/write bit enables the TC bit to generate ESCI transmitter interrupt requests.
This read/write bit enables the SCRF bit to generate ESCI receiver interrupt requests. Setting the
SCRIE bit in SCC2 enables the SCRF bit to generate interrupt requests.
This read/write bit enables the IDLE bit to generate ESCI receiver interrupt requests.
Setting this read/write bit begins the transmission by sending a preamble of 10 or 11 1s from the
transmit shift register to the TxD pin. If software clears the TE bit, the transmitter completes any
transmission in progress before the TxD returns to the idle condition (high). Clearing and then setting
TE during a transmission queues an idle character to be sent after the character currently being
transmitted.
Setting this read/write bit enables the receiver. Clearing the RE bit disables the receiver but does not
affect receiver interrupt flag bits.
1 = SCTE enabled to generate interrupt
0 = SCTE not enabled to generate interrupt
1 = TC enabled to generate interrupt requests
0 = TC not enabled to generate interrupt requests
1 = SCRF enabled to generate interrupt
0 = SCRF not enabled to generate interrupt
1 = IDLE enabled to generate interrupt requests
0 = IDLE not enabled to generate interrupt requests
1 = Transmitter enabled
0 = Transmitter disabled
1 = Receiver enabled
0 = Receiver disabled
Enables the receiver
Enables ESCI wakeup
Transmits ESCI break characters
Reset:
Read:
Write:
Writing to the TE bit is not allowed when the enable ESCI bit (ENSCI) is
clear. ENSCI is in ESCI control register 1.
SCTIE
Bit 7
0
Figure 13-10. ESCI Control Register 2 (SCC2)
TCIE
6
0
MC68HC908QB8 Data Sheet, Rev. 2
SCRIE
5
0
NOTE
ILIE
0
4
TE
3
0
RE
2
0
RWU
1
0
Freescale Semiconductor
Bit 0
SBK
0