mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 398

• Manufacturer Part Number: mc68hc912d60c
• Description: Hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Development Support
BRKCT0 — Breakpoint Control Register 0
Technical Data
398
RESET:
BKEN1 BKEN0
0
0
1
1
BKEN1
Bit 7
0
1
0
1
0
Breakpoints Off
SWI — Dual Address Mode
BDM — Full Breakpoint Mode
BDM — Dual Address Mode
BKEN0
6
0
To trace program flow, setting the BKPM bit causes address comparison
of program data only. Control bits are also available that allow checking
read/write matches.
Read and write anytime.
This register is used to control the breakpoint logic.
BKEN1, BKEN0 — Breakpoint Mode Enable
BKPM — Break on Program Addresses
BK1ALE — Breakpoint 1 Range Control
Mode Selected
This bit controls whether the breakpoint will cause a break on a match
(next instruction boundary) or on a match that will be an executable
opcode. Data and non-executed opcodes cannot cause a break if this
bit is set. This bit has no meaning in SWI dual address mode. The
SWI mode only performs program breakpoints.
Only valid in dual address mode.
Table 19-9. Breakpoint Mode Control
0 = On match, break at the next instruction boundary
1 = On match, break if the match is an instruction that will be
0 = BRKDL will not be used to compare to the address bus.
1 = BRKDL will be used to compare to the address bus.
BKPM
5
0
executed. This uses tagging as its breakpoint mechanism.
Development Support
4
0
0
BRKAH/L Usage BRKDH/L Usage
Address Match
Address Match
Address Match
BK1ALE
3
0
—
BK0ALE
2
0
Address Match
Address Match
Data Match
—
MC68HC912D60A — Rev. 3.1
1
0
0
Freescale Semiconductor
R/W
Bit 0
Yes
Yes
No
—
0
0
Range
Yes
Yes
Yes
—
$0020