mc68160b Freescale Semiconductor, Inc, mc68160b Datasheet

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mc68160b

Manufacturer Part Number
mc68160b
Description
Enhanced Ethernet Transceiver
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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mc68160bAE
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Enhanced Ethernet Transceiver
which supports both IEEE 802.3* Access Unit Interface (AUI) and
10BASE–T Twisted Pair (TP) Interface media connections through external
isolation transformers. It encodes NRZ data to Manchester data and
supplies the signals which are required for data communication via
10BASE–T or AUI interfaces. The MC68160B gluelessly interface to the
Ethernet controller contained in the MC68360 Quad Integrated
Communications Controller (QUICC) device. The MC68160B also interfaces
easily to most other industry–standard IEEE 802.3 LAN controllers.** Prior to
twisted pair data reception, Smart Squelch circuitry qualifies input signals for
correct amplitude, pulse width, and sequence requirements.
** MC68160AB does not support all IEEE 802.3 specifications over extended
**
** MC68160B only support Motorola controllers
The sale and use of this product is licensed under technology covered by one
or more Digital Equipment Corporation patents.
temperature range. Exceptions noted in specifications.
Option
The MC68160B Enhanced Ethernet Interface Circuit is a BiCMOS device
Automatic Twisted Pair Wiring Polarity Fault Detection and Correction
Automatic Port Selection Option with Status Output
Driver Pre–emphasis for Twisted Pair Output Data
Crystal Controlled Clock Oscillator or External Clock Generator Option
Digital Phase–Locked–Loop (DPLL) Timing Recovery and Data Decoding
Standby Mode with Reduced Power Consumption
Twisted Pair Signal Quality Error (Heartbeat) Test Option
Diagnostic Local Loop Back Option
Transmit, Receive and Collision Detection Status Output
Full–Duplex Operation Option on Twisted Pair Port
Twisted Pair Jabber Detection and Status Output
Link Integrity Testing and Status Output
MC68160B
Motorola, Inc. 2000
INTERFACE TRANSCEIVER
Device
ENHANCED ETHERNET
ORDERING INFORMATION
MC68160B
Order this document by MC68160B/D
SEMICONDUCTOR
TECHNICAL DATA
PLASTIC PACKAGE
Temperature Range
T A = –40 to + 85 C
CASE 848D
FB SUFFIX
(LQFP–52)
52
Operating
1
Package
LQFP
Rev 0

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mc68160b Summary of contents

Page 1

... Enhanced Ethernet Transceiver The MC68160B Enhanced Ethernet Interface Circuit is a BiCMOS device which supports both IEEE 802.3* Access Unit Interface (AUI) and 10BASE–T Twisted Pair (TP) Interface media connections through external isolation transformers. It encodes NRZ data to Manchester data and supplies the signals which are required for data communication via 10BASE– ...

Page 2

... TCLK 2 CS0 Jabber CS1 Pre–emphasis Control CS2 TPEN Mode APORT Select TPAPCE TPSQEL TPFULDL LOOP TPJABB TPTX+ 2 MC68160B Mux Mux Collision Detect Collision Detector Control Driver Link Pulse Control Control Squelch Test Circuit TPTX– TPLIL TPSQEL This device contains 20,000 active transistors. ...

Page 3

... MOTOROLA ANALOG IC DEVICE DATA MC68160B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

... TPTX+ NOTE: The sense of the controller interface pins will change, depending on the controller selected. 4 MC68160B Table 1. Pin Function Descriptiont Name/Function Receive Enable Output: Indication of the presence of network activity, synchronous to RCLK. In the standby mode, RENA is driven to the high impedance state. Receive Data Output: Recovered data, synchronous to RCLK. Following a reset operation, 100 ms should be allowed before attempting to read data processed by the MC68160A, B and C ...

Page 5

... LOOP as a test mode is enabled that disrupts normal operation. Twisted Pair Automatic Polarity Correction Enable: When TPAPCE is high, automatic polarity correction is enabled, and MC68160B will internally correct for a polarity fault on the receive circuit. Additionally, when TPAPCE is high, the presence of a polarity fault is indicated on TPPLR ...

Page 6

... Twisted Pair Receiver Inputs (TPRX+, TPRX–) are reversed, TPPLR will be driven to the low logic state to indicate the fault. TPPLR remains low when the MC68160B has automatically corrected for the reversed wires. If the twisted pair link integrity tests fail, this output will be driven to the high logic state ...

Page 7

... CS0 CS1 CS2 NOTE: In standby mode, the MC68160B consumes less power supply current than in any other mode. Additionally, in the standby mode, all of the controller inputs and outputs are driven to the high impedance state. When the standby mode is deasserted, an internal reset pulse of approximately 6.0 s duration is generated. ...

Page 8

... ESD threshold voltage is designed to 700 V Human Body Model. DC ELECTRICAL CHARACTERISTICS ambient operating temperature and power supply voltage ranges.) Characteristic POWER SUPPLY Undervoltage Shutdown Threshold Power Supply Current 8 MC68160B ELECTRICAL CHARACTERISTICS Symbol Min Max Unit T stg – 65 ...

Page 9

... DC ELECTRICAL CHARACTERISTICS limits apply over the recommended ambient operating temperature and power supply voltage ranges for each MC68160B except where noted.) Characteristic TTL COMPATIBLE INPUTS TTL Compatible Input Voltage Low State High State Input Current TTL Compatible Input Pins (Note 1) Input Current TENA TTL Compatible Input Pin: with Pull– ...

Page 10

... DC ELECTRICAL CHARACTERISTICS limits apply over the recommended ambient operating temperature and power supply voltage ranges for each MC68160B except where noted.) Characteristic TWISTED PAIR TRANSMITTER OUTPUTS Differential Output Voltage IDLE Mode Open Circuit Differential Output Impedance TRANSMISSION Mode IDLE Mode Common Mode Output Impedance ...

Page 11

... This is realized with the 39 external resistors shown in Figures 3, 4 and 5, together with the internal driver output resistance. Figure 6. AUI Common Mode Termination MOTOROLA ANALOG IC DEVICE DATA MC68160B + Device VCMD – Figure 5. Test Load B3 39 RCM + ...

Page 12

... AC ELECTRICAL CHARACTERISTICS temperature and power supply voltage ranges for each MC68160B except where noted.) Characteristic EXTERNAL CLOCK INPUT (X1) Cycle Time (Note 1) (See Figure 8) Fall Time Rise Time Low Time High Time RECEIVE PHASE–LOCKED–LOOP SWITCHING Stabilization Time CONTROLLER TRANSMIT SWITCHING (MOTOROLA MODE) ...

Page 13

... CS1 CS2 1.5V TPRX RENA NOTE: CS0 CS1 CS2 is the logical AND operation and refers to the pins not at Logic 1. Figure 10. Transmit Timing (Motorola Mode 1.5V 1.5V TCLK 1.5V TENA TX MOTOROLA ANALOG IC DEVICE DATA MC68160B 0.8V 1.5V 1.5V 1. 1.5V 1.5V 1.5V 1. ...

Page 14

... Figure 11. Receive Timing (Motorola Start of Frame) 1.5V RENA t 25 1.5V RCLK Figure 12. Receive Timing (Motorola End of Frame) RENA RCLK RX 14 MC68160B 1.5V 1.5V 0. 1.5V 1. 1.5V Last Bit MOTOROLA ANALOG IC DEVICE DATA t 21 1.5V 1.5V 1.5V ...

Page 15

... H 39 Figure 15. Test Load C 200 H 39 47.5 V out 39 47.5 NOTE: A total of 50 This is realized with the 39 together with the internal driver output resistance. MOTOROLA ANALOG IC DEVICE DATA MC68160B Symbol V OCMTP t 130 t 131 t 132 t 133 t 134 t 135 t 136 t 137 t 139 t 140 t 141 t 142 Figure 14 ...

Page 16

... TX 1.5V RENA RX TPTX +/– Differential (Logic Levels) TPTX +/– Differential (Pre–Emphasis) Figure 18. TPTX Transmit Timing (End of Frame) Switching t 136 90% TPTX +/– Differential Figure 19. RENA Deassert Delay from TENA TENA RENA 16 MC68160B 1. 133 1.5V t 134 1. 130 ...

Page 17

... TPSQEL Disable Delay Time (See Figure 22) NOTE: The load attached to the specified output capacitor connected to ground, unless otherwise noted. TPTX –585mV (Differential) TPJABB CLSN MOTOROLA ANALOG IC DEVICE DATA MC68160B Figure 20. TPTX+/– Link Pulse Timing t 142 t 141 585mV 50mV Symbol Figure 21. TPJABB Switching ...

Page 18

... Link beats closer in time to this range of values are considered noise, and are rejected. 4. Link beats further apart in time than this range of values are not considered consecutive, and are rejected. Figure 23. Test Load H 1.0 H 200 H 100pF 100pF 100 1 MC68160B 2V 1.5V t 171 t 170 1.5V Symbol V IDFSTP t 180 t 181 ...

Page 19

... TPRX+/– RENA RCLK RX Figure 26. RENA Deassertion Delay from Last Valid Positive Transition of TPRX Pair TPRX+/– RENA Figure 27. TP Receive Link Integrity Switching t 201 TPRX TPLIL MOTOROLA ANALOG IC DEVICE DATA MC68160B Bit n Bit n+1 Bit n 182 t 183 t 181 1.5V 1.5V ...

Page 20

... TPFULDL deassert to data loop back enable NOTE: Load on specified output ground, unless otherwise noted. RENA 1.5V TENA t 210 1.5V CLSN TPFULDL 1.5V CLSN TPFULDL 1.5V t 223 RENA 20 MC68160B Figure 28. TPTX Collision Timing Figure 29. TPTX Full Duplex Timing 1.5V t 220 t 221 1.5V 1.5V Figure 30. TPTX Full Duplex Timing 1.5V t 222 1.5V 1.5V Symbol Min Max ...

Page 21

... The squelch circuits are disabled by the first valid negative differential pulse on either the AUI receive data or collision pair positive differential pulse occurs on either the AUI receive data or collision pair > 175 ns, end of frame is assumed and squelch circuitry is turned on. MOTOROLA ANALOG IC DEVICE DATA MC68160B Symbol t 240 ...

Page 22

... If the EEST isn’t receiving data, the controller may initiate transmission. NRZ data from the communications controller SIA interface is encoded by the MC68160B into Manchester Code in preparation for transmission on the media. The data is then applied to either the AUI or TP port. If the data was transmitted using the 10BASE– ...

Page 23

... Collision is the occurrence of simultaneous transmit activity by two or more stations on the network. In the event of collision, the data transfer paths are unaffected. If the MC68160B is in the twisted pair mode, collision is detect by simultaneous receive and transmit activity the AUI mode, collision is detected by activity on the ACX+/– pins. In either case, if collision is detected, the CLSN pin will assert to notify the communications controller ...

Page 24

... TPFULDL high and TPSQEL low. Then, while keeping TPSQEL low, raise LOOP after 300 ms lower TPFULDL. This will put the MC68160B into test mode but also resets the MC68160B. After 500 ms lower LOOP to get out of the test uu mode. TPFULDL may then be de–asserted if desired. ...

Page 25

... TXLED RXLED CLLED TPLIL TPPLR TPJABB TPEN GNDCTL TCLK TENA RCLK CLSN TX MOTOROLA ANALOG IC DEVICE DATA MC68160B of (Example ATX+ ATX– ARX+ ARX– ACX+ ACX– GNDSUB GNDDIG VDDDIG X2 X1 VDDVCO GNDVCO Î ...

Page 26

... –H– –T– 3 SEATING 4X PLANE 0.05 (0.002 VIEW AA 26 MC68160B OUTLINE DIMENSIONS FB SUFFIX PLASTIC PACKAGE CASE 848D-03 (LQFP–52) ISSUE C 4X TIPS 0.20 (0.008) T L– –M– PLATING NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14 ...

Page 27

... MOTOROLA ANALOG IC DEVICE DATA MC68160B NOTES 27 ...

Page 28

... Motorola, Inc. Motorola, Inc Equal JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, MOTOROLA ANALOG IC DEVICE DATA Mfax is a trademark of Motorola, Inc. MC68160B/D ...

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