dp83950b National Semiconductor Corporation, dp83950b Datasheet - Page 78

• Manufacturer Part Number: dp83950b
• Description: Dp83950b Rictm Repeater Interface Controller
• Manufacturer: National Semiconductor Corporation

9 0 AC and DC Specifications
REGISTER WRITE TIMING
Note Assuming zero propagation delay on external buffer
Note Minimum high time between read write cycles is 100 ns
Note The data will always TRI-STATE before BUFEN goes active with a load of 100 pF on the data bus
Note When RDY is used the minimum 600 ns write width does not have to be maintained
10 0 AC Timing Test Conditions
All specifications are valid only if the mandatory isolation is
employed and all differential signals are taken to be at the
AUI side of the pulse transformer
Input Pulse Levels (TTL CMOS)
Input Rise and Fall Times (TTL CMOS)
Input and Output Reference
Input Pulse Levels (Diff )
Input and Output
TRI-STATE Reference Levels
Output Load (See Figure Below)
Levels (TTL CMOS)
Reference Levels (Diff )
Number
T90
T91
T92
T93
T94
T95
T96
T97
T98
T99
Symbol
wradrs
wradrh
wrabufa
wribufi
wradatv
wrdath
wrardya
wrirdyi
wrw
wradt
Float (DV)
Write Address Setup
Write Address Hold
Write Active to BUFEN Active
Write Inactive to BUFEN Inactive
Write Active to Data Valid
Write Data Hold
Write Active to RDY Active
Write Inactive to RDY Inactive
Write Width
Write Active to
Data TRI-STATE
the Differential
50% Point of
GND to 3 0V
(Continued)
2 0 V
g
Parameter
1 5V
0 5V
5 ns
P-P
78
Note 1 100 pF includes scope and jig capacitance
Note 2 S1
S1
S1
S1
S1
e
e
e
e
e
active low to High Impedance
measurements
active high to High Impedance
measurements
V
GND for V
V
Open for timing tests for push pull outputs
CC
CC
GND for High Impedance to active high and
for V
for High Impedance to active low and
OL
Min
340
600
OH
95
0
0
0
test
test
TL F 11096 – 34
Max
355
275
585
350
35
30
TL F 11096 – 36
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns