pldc20ra10 Cypress Semiconductor Corporation., pldc20ra10 Datasheet

pldc20ra10

Manufacturer Part Number

pldc20ra10

Description

Reprogrammable Asynchronous Cmos Logic Device

Manufacturer

Cypress Semiconductor Corporation.

Datasheet

1.PLDC20RA10.pdf (14 pages)

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Current page: 1 of 14
Download datasheet (520Kb)

Cypress Semiconductor Corporation

Document #: 38-03012 Rev. **

1PLDC20RA10

Features

• Advanced-user programmable macrocell

• CMOS EPROM technology for reprogrammability

• Up to 20 input terms

• 10 programmable I/O macrocells

• Output macrocell programmable as combinatorial or

• Product-term control of register clock, reset and set and

• Register preload and power-up reset

• Four data product terms per output macrocell

• Fast

• Low power

Logic Block Diagram

asynchronous D-type registered output

output enable

— Commercial

— Military

— I

= 15 ns

= 7 ns

= 20 ns

= 10 ns

max - 80 mA (Commercial)

= 15 ns

= 20 ns

MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL

I/O

•

I/O

3901 North First Street

I/O

Reprogrammable Asynchronous

Functional Description

The Cypress PLDC20RA10 is a high-performance, sec-

ond-generation programmable logic device employing a flexi-

ble macrocell structure that allows any individual output to be

configured independently as a combinatorial output or as a

fully asynchronous D-type registered output.

The Cypress PLDC20RA10 provides lower-power operation

with superior speed performance than functionally equivalent

bipolar devices through the use of high-performance 0.8-mi-

cron CMOS manufacturing technology.

The PLDC20RA10 is packaged in a 24 pin 300-mil molded

DIP, a 300-mil windowed cerDIP, and a 28-lead square lead-

less chip carrier, providing up to 20 inputs and 10 outputs.

When the windowed device is exposed to UV light, the 20RA10

is erased and can then be reprogrammed.

• High reliability

• Windowed DIP, windowed LCC, DIP, LCC, PLCC avail-

I/O

able

— I

— Proven EPROM technology

— >2001V input protection

— 100% programming and functional testing

•

max = 85 mA (Military)

San Jose

I/O

CMOS Logic Device

I/O

•

CA 95134

I/O

PLDC20RA10

Revised March 26, 1997

•

I/O

408-943-2600

RA10–1

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