w681308 Winbond Electronics Corp America, w681308 Datasheet - Page 25

• Manufacturer Part Number: w681308
• Description: Usb Audio Controller
• Manufacturer: Winbond Electronics Corp America

8.6.2
Timer/Counter 2 is a 16 bit up/down counter which is configured by the T2MOD register and controlled by the T2CON
register. Timer/Counter 2 is equipped with a capture/reload capability. As with the Timer 0 and Timer 1 counters, they
provide wide selection and control of the clock and selection of the operating modes. The clock source for Timer/ Counter 2
can be selected for the crystal oscillator, which is divided by 12 or 4 ( C/T2 = 0). The clock is then enabled when TR2 is a 1,
and disabled when TR2 is a 0.
8.6.3
The Watchdog timer is a free-running timer that can be programmed by the user to serve as a system supervisor, a time-
base generator or an event timer. It is basically a set of dividers that divide the system clock. The divider output is selectable
and determines the time-out interval. When the time-out occurs the flag WDIF is set, which can cause an interrupt if enabled,
and a system reset can also be caused if it is enabled. The interrupt will occur if the individual interrupt enable and the global
enable are set. The interrupt and reset functions are independent of each other and may be used separately or together
depending on the software employed.
When used as a simple timer, the reset and interrupt functions are disabled. The timer will set the WDIF flag each time the
timer completes the selected time interval. The WDIF flag is polled to detect a time-out and the RWT allows software to
restart the timer. The Watchdog timer can also be used as a very long timer. The interrupt feature is enabled in this case.
Every time the time-out occurs an interrupt will occur if the global interrupt enable EA is set.
T2MOD
T2CON
C9H
PWT(WDCON.
Watchdog
Reset
Timer/Counter 2
Watchdog Timer
48MHz
12/24/
Fosc
Bit 7
TF2
-
0
EXF2
Bit 6
-
Table 5 Timer 2 Mode/Control TMOD/TCON SFR
23
26 27
25
24
RCLK
22
Bit 5
-
XXXX PRODUCT DESCRIPTION
TCLK
Bit 4
00
01
10
11
-
25
Time-out
WD1,WD
Enable Watchdog timer
0
EWT(WDCON.1)
EXEN2
T2CR
Bit 3
reset
EWD(EIE.4
Bit 2
TR2
WTRF
WDIF
)
clock
delay
-
512
C/T2
Bit 1
-
W681308
Rev1.2
Interru
Res
CP/RL2
et
DCEN
pt
Bit 0