mc33984 Freescale Semiconductor, Inc, mc33984 Datasheet - Page 16

• Manufacturer Part Number: mc33984
• Description: Dual Intelligent High-current Self-protected Silicon High-side Switch 4.0 M
• Manufacturer: Freescale Semiconductor, Inc

used to replace electromechanical relays, fuses, and discrete
devices in power management applications. The 33984 is
designed for harsh environments, and it includes self-
recovery features. The device is suitable for loads with high
inrush current, as well as motors and all types of resistive and
inductive loads.
OUTPUT CURRENT MONITORING (CSNS)
designated HS0-1 output. That current is fed into a ground-
referenced resistor and its voltage is monitored by an MCU's
A/D. The channel to be monitored is selected via the SPI.
This pin can be tri-stated through SPI.
WAKE (WAKE)
the watchdog timer function. An internal clamp protects this
pin from high damaging voltages when the output is current
limited with an external resistor. This input has a passive
internal pull-down.
RESET (RST)
and fault registers, as well as place the device in a low current
sleep mode. The pin also starts the watchdog timer when
transitioning from Logic LOW to Logic HIGH. This pin should
not be allowed to be Logic HIGH until V
This pin has a passive internal pull-down.
DIRECT IN 0 & 1 (INx)
1. This input has an active internal pull-down current source
and requires CMOS logic levels. This input may be
configured via SPI.
FAULT STATUS (FS)
external pull-up resistor to V
device fault condition is detected, this pin is active LOW.
Specific device diagnostic faults are reported via the SPI SO
pin.
FAIL-SAFE INPUT (FSI)
and ground determines the state of the outputs after a
watchdog timeout occurs. Depending on the resistance
value, either all outputs are OFF, ON, or the output HS0 only
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33984
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
The 33984 is a dual self-protected 4.0 mΩ silicon switch
This pin is used to output a current proportional to the
This pin is used to input a Logic [1] signal so as to enable
This input pin is used to initialize the device configuration
This input pin is used to directly control the output HS0 and
This is an open drain configured output requiring an
The value of the resistance connected between this pin
DD
for fault reporting. When a
DD
is in regulation.
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
INTRODUCTION
via the Serial Peripheral Interface (SPI). A dedicated parallel
input is available for alternate and Pulse Width Modulation
(PWM) control of each output. SPI-programmable fault trip
thresholds allow the device to be adjusted for optimal
performance in the application.
nonleaded PQFN package with exposed tabs.
is ON. When the FSI pin is connected to GND, the watchdog
circuit and fail-safe operation are disabled. This pin
incorporates an active internal pull-up current source.
CHIP SELECT (CS)
master microcontroller (MCU). The MCU determines which
device is addressed (selected) to receive data by pulling the
CS
communication with the device. Other unselected devices on
the serial link having their
disregard the SPI communication data sent. This pin
incorporates an active internal pull-up current source.
SERIAL CLOCK (SCLK)
required bit shift clock for SPI communication. It transitions
one time per bit transferred at an operating frequency, f
defined by the communication interface. The 50 percent duty
cycle CMOS-level serial clock signal is idle between
command transfers. The signal is used to shift data into and
out of the device. This input has an active internal pull-down
current source.
SERIAL INPUT (SI)
Serial Data Output of the MCU or to the SO pin of the
previous device of a daisy chain of devices. The input
requires CMOS logic-level signals and incorporates an active
internal pull-down current source. Device control is facilitated
by the input's receiving the MSB first of a serial 8-bit control
command. The MCU ensures data is available upon the
falling edge of SCLK. The logic state of SI present upon the
rising edge of SCLK loads that bit command into the internal
command shift register.
DIGITAL DRAIN VOLTAGE (VDD)
to the SPI circuit. In the event V
provides power to a portion of the logic, ensuring limited
Programming, control, and diagnostics are implemented
The 33984 is packaged in a power-enhanced 12 x 12
This input pin is connected to a chip select output of a
This input pin is connected to the MCU providing the
This is a command data input pin connected to the SPI
This is an external voltage input pin used to supply power
pin of the selected device Logic LOW, enabling SPI
Analog Integrated Circuit Device Data
CS
pins pulled-up Logic HIGH
DD
Freescale Semiconductor
is lost, an internal supply
SPI
,