adm6995 ETC-unknow, adm6995 Datasheet - Page 22

• Manufacturer Part Number: adm6995
• Description: Port 10/100 Mb/s Single Chip Ethiernet Switch Controller
• Manufacturer: ETC-unknow

ADM6995L
ADMtek Inc.
3.6
3.5.2
3.6.1
3.6.2
For 100Base-TX operation, the incoming signal is detected by the on-chip twisted-pair
receiver that consists of a differential line receiver, an adaptive equalizer and a base-line
wander compensation circuits.
The ADM6995L uses an adaptive equalizer that changes filter frequency response in
accordance with cable length. The cable length is estimated based on the incoming signal
strength. The equalizer tunes itself automatically for any cable length to compensate for
the amplitude and phase distortions incurred from the cable.
10Base-T Module
The 10Base-T Transceiver Module is IEEE 802.3 compliant. It includes the receiver,
transmitter, collision, heartbeat, loop back, jabber, wave shaper, and link integrity
functions, as defined in the standard. Figure 3 provides an overview for the 10Base-T
module.
The ADM6995L 10Base-T module is comprised of the following functional blocks:
• Manchester encoder and decoder
• Collision detector
• Link test function
• Transmit driver and receiver
• Serial and parallel interface
• Jabber and SQE test functions
• Polarity detection and correction
The ADM6995L 10Base-T module is capable of operating in either half-duplex mode or
full-duplex mode. In half-duplex mode, the ADM6995L functions as an IEEE 802.3
compliant transceiver with fully integrated filtering. The COL signal is asserted during
collisions or jabber events, and the CRS signal is asserted during transmit and receive. In
full duplex mode the ADM6995L can simultaneously transmit and receive data.
Data encoding and transmission begins when the transmission enable input (TXEN) goes
high and continues as long as the transceiver is in good link state. Transmission ends
when the transmission enable input goes low. The last transition occurs at the center of
the bit cell if the last bit is a 1, or at the boundary of the bit cell if the last bit is 0.
Decoding is accomplished by a differential input receiver circuit and a phase-locked loop
that separate the Manchester-encoded data stream into clock signals and NRZ data. The
decoder detects the end of a frame when no more mid bit transitions are detected. Within
one and half bit times after the last bit, carrier sense is de-asserted.
Twisted-Pair Receiver
Operation Modes
Manchester Encoder/Decoder
Function Description
3-6