adm6995 ETC-unknow, adm6995 Datasheet - Page 33

• Manufacturer Part Number: adm6995
• Description: Port 10/100 Mb/s Single Chip Ethiernet Switch Controller
• Manufacturer: ETC-unknow

ADM6995L
ADMtek Inc.
Bits
0
1
2
3
4
5
6
7
9:8
13:10 R/W PVID. Port VLAN ID. Check Register 0x28h~0x2ch for other
14
15
Bits
8:0
9
15:10
4.3.2
4.3.3 Reserved Register, offset: 0x0ah
Type Description
Type Description
R/W 802.3x Flow control command ability. 1: enable.
R/W Auto negotiation Enable. 1: enable, 0: disable.
R/W Speed. 1: 100M, 0: 10M.
R/W Duplex. 1: Full Duplex, 0: Half Duplex.
R/W Output Packet Tagging. 1: Tag. 0:UnTag.
R/W Port Disable. 1: disable port. 0: enable port.
R/W TOS over VLAN priority. 1: Check TOS first, 0: Check VLAN.
R/W Enable port-base priority. 1: Port Base Priority. 0: VLAN or TOS. If
R/W Port-base priority.
R/W Select FX. 1: FX mode. 0: TP mode.
R/W Crossover Auto MDIX enable. 1: enable. 0: disable.
R/W Replaced packet VID 0, 1 by PVID. 1: enable, 0: disable.
RO Reserved
RO Reserved
Configuration Registers, offset: 0x01h ~ 0x09h
0: disable.
packet without VLAN or TOS then port priority turn on.
Note:
If this bit turn on then ADM6995L will not check TOS or VLAN as
priority reference. ADM6995L will check port base priority only.
ADM6995L default is bypass mode which checks port base priority only.
If user want check VLAN tag priority then must set chip at Tag mode.
PVID[11:4]
Note:
Port7 TX/FX can set by hardware Reset latch value P7FX. If hardware
pin set Port7 as FX then this bit is useless. If hardware pin set Port7 as
TX then this pin can set Port7 as FX or TX.
Note:
Hardware Reset latch value EECK can set global Auto MDIX function. If
hardware pin set all port at Auto MDIX then this bit is useless. If
hardware pin set chip at non Auto MDIX then this bit can set each port at
Auto MDIX.
Register Description
Initial value
Initial value
0x102h
0x16h
0x0h
0x1h
0x1h
0x1h
0x1h
0x0h
0x0h
0x0h
0x0h
0x1h
0x0h
0x0h
0x0h
4-3