lan9311 Standard Microsystems Corp., lan9311 Datasheet
lan9311
Manufacturer Part Number
lan9311
Description
Lan9311/lan9311i Two Port 10/100 Managed Ethernet Switch With 16-bit Non-pci Cpu Interface
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9311.pdf
(460 pages)
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PRODUCT FEATURES
Highlights
Target Applications
Key Benefits
SMSC LAN9311/LAN9311i
High performance and full featured 2 port switch with
Easily interfaces to most 16-bit embedded CPU’s
Unique Virtual PHY feature simplifies software
Integrated IEEE 1588 Hardware Time Stamp Unit
Cable, satellite, and IP set-top boxes
Digital televisions
Digital video recorders
VoIP/Video phone systems
Home gateways
Test/Measurement equipment
Industrial automation systems
Ethernet Switch Fabric
Switch Management
VLAN, QoS packet prioritization, Rate Limiting, IGMP
Snooping and management functions
development by mimicking the multiple switch ports
as a single port MAC/PHY
— 32K buffer RAM
— 1K entry forwarding table
— Port based IEEE 802.1Q VLAN support (16 groups)
— IEEE 802.1d spanning tree protocol support
— QoS/CoS Packet prioritization
— IGMP v1/v2/v3 snooping for Multicast packet filtering
— IPV6 Multicast Listener Discovery snoop
— Programmable filter by MAC address
— Port mirroring/monitoring/sniffing: ingress and/or egress
— Fully compliant statistics (MIB) gathering counters
— Control registers configurable on-the-fly
traffic on any ports or port pairs
– Programmable IEEE 802.1Q tag insertion/removal
– 4 dynamic QoS queues per port
– Input priority determined by VLAN tag, DA lookup,
– Programmable class of service map based on input
– Remapping of 802.1Q priority field on per port basis
– Programmable rate limiting at the ingress/egress
TOS, DIFFSERV or port default value
priority
ports with random early discard, per port / priority
DATASHEET
Two Port 10/100 Managed
Ethernet Switch with 16-Bit
Non-PCI CPU Interface
Ports
High-performance host bus interface
IEEE 1588 Hardware Time Stamp Unit
Comprehensive Power Management Features
Other Features
Single 3.3V power supply
Available in Commercial & Industrial Temp. Ranges
— 2 internal 10/100 PHYs with HP Auto-MDIX support
— Fully compliant with IEEE 802.3 standards
— 10BASE-T and 100BASE-TX support
— Full and half duplex support
— Full duplex flow control
— Backpressure (forced collision) half duplex flow control
— Automatic flow control based on programmable levels
— Automatic 32-bit CRC generation and checking
— Automatic payload padding
— 2K Jumbo packet support
— Programmable interframe gap, flow control pause value
— Full transmit/receive statistics
— Auto-negotiation
— Automatic MDI/MDI-X
— Loop-back mode
— Provides in-band network communication path
— Access to management registers
— Simple, SRAM-like interface
— 16-bit data bus
— Big, little, and mixed endian support
— Large TX and RX FIFO’s for high latency applications
— Programmable water marks and threshold levels
— Host interrupt support
— Global 64-bit tunable clock
— Master or slave mode per port
— Time stamp on TX or RX of Sync and Delay_req
— 64-bit timer comparator event generation (GPIO or IRQ)
— Wake on LAN
— Wake on link status change (energy detect)
— Magic packet wakeup
— Wakeup indicator event signal
— General Purpose Timer
— Serial EEPROM interface (I
— Programmable GPIOs/LEDs
LAN9311/LAN9311i
packets per port, Timestamp on GPIO
master) for non-managed configuration
2
C master or Microwire
Revision 1.2 (04-08-08)
Datasheet
TM
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