lan9303m Standard Microsystems Corp., lan9303m Datasheet - Page 229

• Manufacturer Part Number: lan9303m
• Description: Small Form Factor Three Port 10/100 Managed Ethernet Switch With Dual Mii/rmii/turbo Mii
• Manufacturer: Standard Microsystems Corp.

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
REGISTER #
0824h-083Fh
0842h-0850h
081Ah
081Bh
081Ch
081Dh
081Eh
0812h
0813h
0814h
0815h
0816h
0817h
0818h
0819h
081Fh
0820h
0821h
0822h
0823h
0840h
0841h
0851h
0852h
Table 13.14 Indirectly Accessible Switch Control and Status Registers (continued)
MAC_RX_128_TO_255_CNT_1
MAC_RX_CRCERR_CNT_1
MAC_RX_256_TO_511_CNT_1
MAC_RX_OVRSZE_CNT_1
MAC_RX_MULCST_CNT_1
MAC_RX_BRDCST_CNT_1
MAC_TX_FC_SETTINGS_1
MAC_RX_CTLFRM_CNT_1
MAC_RX_512_TO_1023_CNT_1
MAC_RX_PKTLEN_CNT_1
MAC_RX_65_TO_127_CNT_1
MAC_RX_1024_TO_MAX_CNT_1
MAC_RX_GOODPKTLEN_CNT_1
MAC_RX_PKTOK_CNT_1
MAC_RX_PAUSE_CNT_1
MAC_RX_SYMBL_CNT_1
MAC_TX_DEFER_CNT_1
MAC_TX_PAUSE_CNT_1
MAC_RX_ALIGN_CNT_1
MAC_RX_FRAG_CNT_1
MAC_RX_JABB_CNT_1
MAC_TX_CFG_1
RESERVED
RESERVED
SYMBOL
DATASHEET
Port 1 MAC Receive 65 to 127 Byte Count Register,
Section 13.4.2.5
Port 1 MAC Receive 128 to 255 Byte Count Register,
Section 13.4.2.6
Port 1 MAC Receive 256 to 511 Byte Count Register,
Section 13.4.2.7
Port 1 MAC Receive 512 to 1023 Byte Count Register,
Section 13.4.2.8
Port 1 MAC Receive 1024 to Max Byte Count Register,
Section 13.4.2.9
Port 1 MAC Receive Oversize Count Register,
Section 13.4.2.10
Port 1 MAC Receive OK Count Register,
Port 1 MAC Receive CRC Error Count Register,
Section 13.4.2.12
Port 1 MAC Receive Multicast Count Register,
Section 13.4.2.13
Port 1 MAC Receive Broadcast Count Register,
Section 13.4.2.14
Port 1 MAC Receive Pause Frame Count Register,
Section 13.4.2.15
Port 1 MAC Receive Fragment Error Count Register,
Section 13.4.2.16
Port 1 MAC Receive Jabber Error Count Register,
Section 13.4.2.17
Port 1 MAC Receive Alignment Error Count Register,
Section 13.4.2.18
Port 1 MAC Receive Packet Length Count Register,
Section 13.4.2.19
Port 1 MAC Receive Good Packet Length Count Register,
Section 13.4.2.20
Port 1 MAC Receive Symbol Error Count Register,
Section 13.4.2.21
Port 1 MAC Receive Control Frame Count Register,
Section 13.4.2.22
Reserved for Future Use
Port 1 MAC Transmit Configuration Register,
Port 1 MAC Transmit Flow Control Settings Register,
Section 13.4.2.24
Reserved for Future Use
Port 1 MAC Transmit Deferred Count Register,
Section 13.4.2.25
Port 1 MAC Transmit Pause Count Register,
229
REGISTER NAME
Section 13.4.2.11
Revision 1.3 (08-27-09)
Section 13.4.2.26
Section 13.4.2.23