lan9303m Standard Microsystems Corp., lan9303m Datasheet - Page 55

• Manufacturer Part Number: lan9303m
• Description: Small Form Factor Three Port 10/100 Managed Ethernet Switch With Dual Mii/rmii/turbo Mii
• Manufacturer: Standard Microsystems Corp.

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
STRAP NAME
FD_FC_strap_1
manual_FC_strap_1
auto_mdix_strap_2
manual_mdix_strap_2
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
DESCRIPTION
Port 1 Full-Duplex Flow Control Enable Strap: This strap
is used to configure the default value of the following
register bits (x=1):
This strap may affect the default value of the following
register bits (x=1):
Refer to the respective register definition sections for
additional information.
Port 1 Manual Flow Control Enable Strap: Configures the
default value of the
Select (MANUAL_FC_1)
Control Register
This strap affects the default value of the following register
bits (x=1):
Note:
Port 2 Auto-MDIX Enable Strap: Configures the default
value of the
Hardware Configuration Register
This strap is used in conjunction with
to configure Port 2 Auto-MDIX functionality when the
MDIX Control (AMDIXCTRL)
Special Control/Status Indication Register
(PHY_SPECIAL_CONTROL_STAT_IND_x)
strap settings should be used for auto-MDIX configuration.
Refer to the respective register definition sections for
additional information.
Port 2 Manual MDIX Strap: Configures MDI(0) or MDIX(1)
for Port 2 when the auto_mdix_strap_2 is low and the
MDIX Control (AMDIXCTRL)
Special Control/Status Indication Register
(PHY_SPECIAL_CONTROL_STAT_IND_x)
strap settings are to be used for auto-MDIX configuration.
Port 1 Full-Duplex Transmit Flow Control Enable
(TX_FC_1)
Enable (RX_FC_1)
Register (MANUAL_FC_1)
Asymmetric Pause
Advertisement Register (PHY_AN_ADV_x)
Asymmetric Pause
x PHY Auto-Negotiation Advertisement Register
(PHY_AN_ADV_x)
This strap is not used in Port 1 MII PHY, RMII
PHY, or MII MAC mode. Full-duplex flow control
should be controlled manually by the host, if
desired.
AMDIX_EN Strap State Port 2
and
DATASHEET
(MANUAL_FC_1).
Port 1 Full-Duplex Receive Flow Control
Port 1 Full-Duplex Manual Flow Control
bit of the
bits of the
and
55
bit in the
Symmetric Pause
bit in the (x=2)
bit of the (x=2)
Port x PHY Auto-Negotiation
Port 1 Manual Flow Control
(HW_CFG).
Port 1 Manual Flow
manual_mdix_strap_2
bits of the
bit of the
indicates the
indicates the
Port x PHY
Port x PHY
Auto-
Auto-
Port
PIN / DEFAULT
VALUE
1b
0b
AMDIX2 LED1P
0b
Revision 1.3 (08-27-09)
Note 4.1