w83312sn Winbond Electronics Corp America, w83312sn Datasheet - Page 10

• Manufacturer Part Number: w83312sn
• Description: Bus Termination Regulator
• Manufacturer: Winbond Electronics Corp America

6.7 Input Capacitor
6.8 Output Capacitor
6.9 Layout Consideration
voltage difference between VIN and VOUT times I
as shown in below equation.
In this case, if VIN is connected to an alternative power supply lower than the VDDQ voltage,
overall power loss can be reduced. For the sink phase, VOUT voltage is applied across the
internal LDO regulator and the power dissipation, P
equation.
Because the device does not sink and source current at the same time and the I
may vary rapidly with time, the actual power dissipation should be the time average of the
above dissipations over the thermal relaxation duration of the system. Another source of
power consumption is the current used for the internal current control circuitry form VCNTL
supply and the VIN supply. This can be estimate as 10mW or less during normal operating
conditions. The power must be effectively dissipated from the package.
Maximum power dissipation allowed by the package is calculated by below equation.
Depending on the trace impedance between the VIN bulk power supply to the device, a
transient increase of source current is supplied mostly by the charge from the VIN input
capacitor. Use a 100uF (or greater) capacitor to supply this transient charge. Provide more
input capacitance as more output capacitance is used at VOUT.
For stable operation, the total capacitance of the VOUT terminal must be greater than 100uF.
Attach two or more capacitors in parallel to minimize the effect of equivalent series resistance
(ESR) and equivalent series inductance (ESL).
Consider the following points before starting the W83312SN layout design. Fig. 6-4 shows the
suggestion of minimum land pattern. Fig. 6-5 shows the recommended PCB layout. Using
“dog bone” copper patterns on the top layer can increase efficiency of heat dissipating.
The input bypass capacitor for VIN should be placed as close as possible to the pin with
short and wide connections.
The output capacitor for VOUT should be placed close to the pin with short and wide
connection in order to avoid ESR and/or ESL trace inductance.
In order to effectively remove heat from the package, properly prepare the thermal land.
Apply solder directly to the package’s thermal pad. The wide traces of component and the
side copper connected to the thermal land pad help to dissipate heat. The thermal land
connected to the ground plane could also be used to help dissipation.
P
, where
P
P
PKG
DISS_SOURCE
DISS_SINK
T
T
θ
J(MAX)
A(MAX)
= [ T
JA
is the thermal resistance form junction to ambient
J(MAX)
is +125°C
is the maximum ambient temperature in the system
-6-
= VOUT x I
= (VIN-VOUT) x I
– T
A(MAX)
OUT_SINK
] / θ
OUT
current becomes the power dissipation
JA
DISS_SINK
OUT_SOURCE
can be calculated by below
Publication Date: Mar., 2010
W83312SN
OUT
Revision A5
current