adm1069ast-reel Analog Devices, Inc., adm1069ast-reel Datasheet

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adm1069ast-reel

Manufacturer Part Number
adm1069ast-reel
Description
Super Sequencer With Margining Control
Manufacturer
Analog Devices, Inc.
Datasheet
FEATURES
Complete supervisory and sequencing solution for up to
8 supply fault detectors enable supervision of supplies to
< 0.5% accuracy at all voltages at 25°C
< 1.0 % accuracy across all voltages and temperatures
4 selectable input attenuators allow supervision of supplies to
4 dual-function inputs, VXn (VX1 to VX4)
8 programmable output drivers, PDO1 to PDO8
Sequencing engine (SE) implements state machine control of
Complete voltage margining solution for 4 voltage rails
4 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage
12-bit ADC for readback of all supervised voltages
Reference input (REFIN) has 2 input options
Device powered by the highest of VPn, VH for improved
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPn = 1.2 V
32-lead 7 mm × 7 mm LQFP
For more information about the ADM1069 register map,
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
8 supplies
PDO outputs
adjustment via dc-to-dc converter trim/feedback node
redundancy
refer to the
14.4 V on VH
6 V on VPn (VP1 to VP3)
High impedance input to supply fault detector with
General-purpose logic input
Open collector with external pull-up
Push/pull output, driven to VDDCAP or VPn
Open collector with weak pull-up to VDDCAP or VPn
Internally charge-pumped high drive for use with external
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Driven directly from 2.048 V (±0.25%) REFOUT pin
More accurate external reference for improved ADC
thresholds between 0.573 V and 1.375 V
N-FET (PDO1 to PDO6 only)
performance
AN-721 Application
Note.
Super Sequencer
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
AGND
APPLICATIONS
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
GENERAL DESCRIPTION
The ADM1069 is a configurable supervisory/sequencing device
that offers a single-chip solution for supply monitoring and
sequencing in multiple supply systems. In addition to these
functions, the ADM1069 integrates a 12-bit ADC and four 8-bit
voltage output DACs. These circuits can be used to implement a
closed-loop margining system that enables supply adjustment
by altering either the feedback node or reference of a dc-to-dc
converter using the DAC outputs.
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
DAC1
V
DAC
ADM1069
OUT
®
CLOSED-LOOP
MARGINING SYSTEM
PROGRAMMABLE
FUNCTIONAL BLOCK DIAGRAM
(LOGIC INPUTS
GENERATORS
FUNCTION
DAC2
V
DAC
with Margining Control
INPUTS
RESET
OUT
DUAL-
(SFDs)
SFDs)
OR
DAC3
V
DAC
OUT
REFIN REFOUT REFGND
SAR ADC
12-BIT
©2006 Analog Devices, Inc. All rights reserved.
DAC4
V
DAC
OUT
SEQUENCING
Figure 1.
ENGINE
VREF
VCCP
N-CHANNEL FET)
LOGIC SIGNALS)
CONFIGURABLE
CONFIGURABLE
SDA SCL A1
(LV CAPABLE
(HV CAPABLE
(continued on Page 3)
ADM1069
OF DRIVING
OF DRIVING
GATES OF
DRIVERS
DRIVERS
ARBITRATOR
OUTPUT
OUTPUT
INTERFACE
GND
SMBus
VDD
www.analog.com
EEPROM
A0
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDOGND
VDDCAP

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adm1069ast-reel Summary of contents

Page 1

... CAPABLE OF DRIVING (SFDs) LOGIC SIGNALS) VDD OUT OUT OUT ARBITRATOR DAC DAC DAC DAC2 DAC3 DAC4 VCCP GND Figure 1. (continued on Page 3) www.analog.com ©2006 Analog Devices, Inc. All rights reserved. A0 PDO1 PDO2 PDO3 PDO4 PDO5 PDO6 PDO7 PDO8 PDOGND VDDCAP ...

Page 2

ADM1069 TABLE OF CONTENTS Features .............................................................................................. 1 Functional Block Diagram .............................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 4 Pin Configuration and Function Descriptions............................. 7 Absolute Maximum Ratings............................................................ 8 Thermal Characteristics .............................................................. 8 ESD Caution.................................................................................. ...

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... This design enables very flexible sequencing of the outputs, based on the condition of the inputs. The ADM1069 is controlled via configuration data that can be programmed into an EEPROM. The whole configuration can be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc. 10µF REFIN REFOUT REFGND ...

Page 4

ADM1069 SPECIFICATIONS 3 14 VPn = 3 6.0 V Table 1. Parameter POWER SUPPLY ARBITRATION VH, VPn VPn VH VDDCAP C VDDCAP POWER SUPPLY Supply Current VPn ...

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Parameter Conversion Time Offset Error Input Noise BUFFERED VOLTAGE OUTPUT DACs Resolution Code 0x80 Output Voltage Range 1 Range 2 Range 3 Range 4 Output Voltage Range LSB Step Size INL DNL Gain Error Maximum Load Current (Source) Maximum Load ...

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ADM1069 Parameter DIGITAL INPUTS (VXn, A0, A1) Input High Voltage Input Low Voltage Input High Current Input Low Current Input Capacitance Programmable Pull-Down Current, I PULL-DOWN SERIAL BUS DIGITAL INPUTS (SDA, SCL) ...

Page 7

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 2. Pin Function Descriptions Pin No. Mnemonic Description VX1 to VX4 (VXn) High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to 1.375 V. Alternatively, ...

Page 8

ADM1069 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Voltage on VH Pin Voltage on VPn Pins Voltage on VXn Pins Voltage on A0, A1 Pins Voltage on REFIN, REFOUT Pins Voltage on VDDCAP, VCCP Pins Voltage on DACn Pins Voltage on ...

Page 9

TYPICAL PERFORMANCE CHARACTERISTICS (V) VP1 Figure 4. V vs. V VDDCAP (V) VH Figure 5. ...

Page 10

ADM1069 2.5 5.0 7.5 I CURRENT (µA) LOAD Figure 10. V (FET Drive Mode) vs. I PDO1 5.0 4.5 4.0 3.5 3.0 2.5 VP1 = 3V 2.0 1.5 1.0 0.5 0 ...

Page 11

CH1 200mV M1.00μs CH1 756mV Figure 16. Transient Response of DAC Code Change into Typical Load 1 CH1 200mV M1.00μs CH1 Figure 17. Transient Response of DAC to Turn-On from HI-Z State DAC 20kΩ BUFFER PROBE OUTPUT 47pF POINT ...

Page 12

ADM1069 POWERING THE ADM1069 The ADM1069 is powered from the highest voltage input on either the positive-only supply inputs (VPn) or the high voltage supply input (VH). This technique offers improved redundancy because the device is not dependent on any ...

Page 13

INPUTS SUPPLY SUPERVISION The ADM1069 has eight programmable inputs. Four of these are dedicated supply fault detectors (SFDs). These dedicated inputs are called VH and VPn (VP1 to VP3) by default. The other four inputs are labeled VXn (VX1 to ...

Page 14

ADM1069 INPUT COMPARATOR HYSTERESIS The UV and OV comparators shown in Figure 22 are always looking at VPn. To avoid chattering (multiple transitions when the input is very close to the set threshold level), these compara- tors have digitally programmable ...

Page 15

VXn PINS AS DIGITAL INPUTS As mentioned in the Supply Supervision with VXn Inputs section, the VXn input pins on the ADM1069 have dual functionality. The second function digital input to the device. Therefore, the ADM1069 can ...

Page 16

ADM1069 OUTPUTS SUPPLY SEQUENCING THROUGH CONFIGURABLE OUTPUT DRIVERS Supply sequencing is achieved with the ADM1069 using the programmable driver outputs (PDOs) on the device as control signals for supplies. The output drivers can be used as logic enables or as ...

Page 17

DEFAULT OUTPUT CONFIGURATION All of the internal registers in an unprogrammed ADM1069 device from the factory are set to zero. Because of this, the PDOs are pulled to GND by a weak (20 kΩ) on-chip pull-down resistor. All PDOs behave ...

Page 18

ADM1069 SEQUENCING ENGINE OVERVIEW The ADM1069 SE provides the user with powerful and flexible control of sequencing. The SE implements a state machine control of the PDO outputs, with state changes conditional on input events. SE programs can enable complex ...

Page 19

SEQUENCING ENGINE APPLICATION EXAMPLE The application in this section demonstrates the operation of the sequencing engine (SE). Figure 26 shows how the simple building block of a single SE state can be used to build a power- up sequence for ...

Page 20

ADM1069 Sequence Detector The sequence detector block is used to detect when a step in a sequence has been completed. It looks for one of the SE inputs to change state, and is most often used as the gate on ...

Page 21

FAULT AND STATUS REPORTING The ADM1069 has a fault latch for recording faults. Two registers are set aside for this purpose, FSTAT1 and FSTAT2. A single bit is assigned to each input of the device, and a fault on that ...

Page 22

ADM1069 VOLTAGE READBACK The ADM1069 has an on-board 12-bit accurate ADC for voltage readback over the SMBus. The ADC has an 8-channel analog mux on the front end. The eight channels consist of the eight SFD inputs,VH, VPn (VP1 to ...

Page 23

SUPPLY MARGINING OVERVIEW It is often necessary for the system designer to adjust supplies, either to optimize their level or force them away from nominal values to characterize the system performance under these conditions. This is a function typically performed ...

Page 24

ADM1069 WRITING TO THE DACs Four DAC ranges are offered. They can be placed with midcode (Code 0x7F) at 0.6 V, 0.8 V, 1.0 V, and 1.25 V. These voltages are placed to correspond to the most common feedback voltages. ...

Page 25

APPLICATIONS DIAGRAM 12V OUT 3V OUT 3.3V OUT 1.25V OUT 1.2V OUT 0.9V OUT POWER_ON *ONLY ONE MARGINING CIRCUIT SHOWN FOR CLARITY. DAC1 TO DAC4 WILL ALLOW MARGINING FOR UP TO FOUR VOLTAGE RAILS. ...

Page 26

ADM1069 COMMUNICATING WITH THE ADM1069 CONFIGURATION DOWNLOAD AT POWER-UP The configuration of the ADM1069 (such as UV/OV thresholds, glitch filter timeouts, and PDO configurations) is dictated by the contents of RAM. The RAM is comprised of digital latches that are ...

Page 27

POWER-UP (V > 2.5V) CC EEPROM UPDATING THE SEQUENCING ENGINE Sequencing engine (SE) functions are not updated in the same way as regular configuration latches. The SE has its own dedicated 512-byte EEPROM for storing state definitions, providing 63 individual ...

Page 28

ADM1069 SERIAL BUS INTERFACE The ADM1069 is controlled via the serial system management bus (SMBus) and is connected to this bus as a slave device, under the control of a master device. It takes approximately 1 ms after power-up for ...

Page 29

SCL SDA START BY MASTER FRAME 1 SLAVE ADDRESS 1 SCL (CONTINUED) SDA (CONTINUED) FRAME 3 DATA BYTE Figure 35. General SMBus Write Timing Diagram 1 ...

Page 30

ADM1069 SMBus PROTOCOLS FOR RAM AND EEPROM The ADM1069 contains volatile registers (RAM) and nonvola- tile registers (EEPROM). User RAM occupies addresses 0x00 to 0xDF; EEPROM occupies addresses 0xF800 to 0xFBFF. Data can be written to and read from both ...

Page 31

In the ADM1069, the write byte/word protocol is used for three purposes: • To write a single byte of data to RAM. In this case, the command byte is the RAM address from 0x00 to 0xDF and the only data ...

Page 32

ADM1069 In the ADM1069, the receive byte protocol is used to read a single byte of data from a RAM or EEPROM location whose address has previously been set by a send byte or write byte/word operation, as shown in ...

Page 33

... OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 0.05 ORDERING GUIDE Model Temperature Range ADM1069AST −40°C to +85°C ADM1069AST-REEL −40°C to +85°C ADM1069AST-REEL7 −40°C to +85°C 1 ADM1069ASTZ −40°C to +85°C 1 ADM1069ASTZ-REEL −40°C to +85°C 1 ADM1069ASTZ-REEL7 −40°C to +85°C EVAL-ADM1069LQEB Pb-free part. ...

Page 34

ADM1069 NOTES Preliminary Technical Data Rev Page ...

Page 35

NOTES Rev Page ADM1069 ...

Page 36

... ADM1069 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04735-0-10/06(A) Preliminary Technical Data Rev Page ...

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