adm1191nbsp Analog Devices, Inc., adm1191nbsp Datasheet - Page 11

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adm1191nbsp

Manufacturer Part Number
adm1191nbsp
Description
Digital Power Monitor With Convert Pin And Alertb Output
Manufacturer
Analog Devices, Inc.
Datasheet
WRITE AND READ OPERATIONS
The I
types of read and write operations. The operations used in the
ADM1191 are discussed in the sections that follow. Table 6
shows the abbreviations used in the command diagrams (see
Figure 19 to Figure 24).
Table 6. I
Abbreviation
S
P
R
W
A
N
QUICK COMMAND
The quick command operation allows the master to check if the
slave is present on the bus, as follows:
1.
2.
3.
Table 7. Command Byte Operations
Bit
C0
C1
C2
C3
C4
C5
C6
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address, followed by the
write bit (low).
The addressed slave device asserts an acknowledge on SDA.
2
Default
0
0
0
0
0
0
0
C specification defines several protocols for different
2
C Abbreviations
Name
V_CONT
V_ONCE
I_CONT
I_ONCE
VRANGE
N/A
STATUS_RD
Figure 19. Quick Command
1
S
ADDRESS W A
SLAVE
Function
Set to convert voltage continuously. If readback is attempted before the first conversion is complete,
the ADM1191 asserts an acknowledge and returns all 0s in the returned data.
Set to convert voltage once. Self-clears. I
conversion is complete.
Set to convert voltage continuously. If readback is attempted before the first conversion is complete,
the ADM1191 asserts an acknowledge and returns all 0s in the returned data.
Set to convert current once. Self-clears. I
conversion is complete.
Selects different internal attenuation resistor networks for voltage readback. A 0 in C4 selects a 14:1 voltage
divider. A 1 in C4 selects a 7:2 voltage divider. With an ADC full scale of 1.902 V, the voltage at the VCC pin for
an ADC full-scale result is 26.52 V for VRANGE = 0 and 6.65 V for VRANGE = 1.
Unused,
Status Read. When this bit is set, the data byte read back from the ADM1191 is the STATUS byte. It contains
the status of the device alerts. See Table 15 for full details of the STATUS byte.
2
Condition
Start
Stop
Read
Write
Acknowledge
No acknowledge
3
Rev. A | Page 11 of 16
2
2
C asserts a no acknowledge on attempted reads until the ADC
C asserts a no acknowledge on attempted reads until the ADC
WRITE COMMAND BYTE
In the write command byte operation, the master device sends
a command byte to the slave device, as follows:
1.
2.
3.
4.
5.
6.
The seven LSBs of the command byte are used to configure and
control the ADM1191. Table 7 provides details of the function
of each bit.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address, followed by the
write bit (low).
The addressed slave device asserts an acknowledge on SDA.
The master sends the command byte. The command byte
is identified by an MSB = 0. An MSB =1 indicates an
extended register write (see the Write Extended Byte
section).
The slave asserts an acknowledge on SDA.
The master asserts a stop condition on SDA to end the
transaction.
1
S
Figure 20. Write Command Byte
ADDRESS W A
SLAVE
2
3
COMMAND
BYTE
4
A P
5 6
ADM1191

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