mc1377 Freescale Semiconductor, Inc, mc1377 Datasheet - Page 5

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mc1377

Manufacturer Part Number
mc1377
Description
Color Television Rgb To Pal/ntsc Encoder
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Timing Circuitry
important functions: it provides the timing (but not the
amplitude) for the sync in the final output; it drives the black
level clamps in the modulators and output amplifier; and it
triggers the ramp generator at Pin 1, which produces burst
envelope and PAL switching. A representative block diagram
of the timing circuitry is shown in Figure 5.
generated which “gates” a color subcarrier into the R–Y and
B–Y modulators. This is done with the ramp generator at
Pin 1.
pin is held low until the arrival of the leading edge of sync. The
rising ramp function, with time constant R–C, passes through
two level sensors – the first one starts the gating pulse and
the second stops it (see Figure 10). Since the “early” part of
the exponential is used, the timing provided is relatively
accurate from chip–to–chip and assembly–to–assembly.
Fixed components are usually adequate. The ramp
continues to rise for more than half of the line interval, thereby
inhibiting burst generation on “half interval” pulses on vertical
front and back porches. The ramp method will produce burst
on the vertical front and back “porches” at full line intervals.
R–Y, B–Y Clamps and Output Clamp/Amplifier
drives the R–Y and B–Y clamps which clamp the R–Y and
B–Y signals to reference black during the blanking periods.
The output amplifier/clamp provides this same function plus
combines and amplifies the chroma and luma components
for composite video output.
Application Circuit
the external circuitry required for typical operation.
5.0 to
25pF
MOTOROLA ANALOG IC DEVICE DATA
* Refers to the choice NTSC/PAL
*
3.58/
4.43*
MHz
The composite sync input at Pin 2 performs three
In order to produce a color burst, a burst envelope must be
The ramp generator at Pin 1 is an R–C type in which the
The sync signal, shown in the block diagram of Figure 6,
Figure 7 illustrates the block diagram of the MC1377 and
(3.58 MHz/4.43 MHz).
PAL Select
NTSC/
220
220
20
15
17
18
0.001
mica
1
PAL/NTS
Latching
Control
Buffer
Ramp
Osc/
Gen
C
H/2
56k
V B
Comparator
Controlled
Composite
Voltage
Pulse
Driver
Burst
Dual
90
Sync
Input
Figure 7. Block Diagram and Application Circuit
2
90
R–Y
15 F
19
R–Y
3
R
Color Difference and
MC1377
0.01
Luminance Matrix
+
V CC
15 F
R, G, B Inputs
4
G
14
0
+
B–Y
Regulator
15 F
V B
8.2V
B–Y
Figure 6. R–Y, B–Y and Output Amplifier Clamps
5
PAL/
NTSC
Sync
Input
B
+
R
C
16
B–Y
R–Y
Sync
V B
1.0k
0.1
–Y
20
6
2
1
Figure 5. Timing Circuitry
Switch
0/180
10k
PAL
Y Delay
400ns
Output Amp/
Amp/Clamp
Generator
Line Drive
PAL/NTSC
Latching
H/2
Clamp
Ramp
Output
Control
–Y
Clamp
Clamp
Clamp
Clamp
–Y
R–Y
B–Y
R–Y
B–Y
8
1.0k
8
Chroma
Amp
13 220
10
11
12
7 0.01
9
100/
1000
62*
0.1
0.1
10
11
12
9
7
Driver
TOKO 166NNF
Pulse
Chroma
Burst
Comparator
0.01
0.1
0.1
–10264AG
Dual
Burst Flag
Composite
Video
3.3k
Video Output
Composite
47/33*
0.1
5

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