mc44353 Freescale Semiconductor, Inc, mc44353 Datasheet - Page 11

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mc44353

Manufacturer Part Number
mc44353
Description
Multi.standard Pal/ntsc Modulator
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Test Modes
TB0–2 and X0–1. These operate by assigning some internal
signals on the UHF phase comparator output current sources
as outlined in the following 2 tables.
UHF frequency is too high, and pulls low when the UHF
frequency is too low. This mode is used when the tuning
voltage is generated by the internal inverting operational
amplifier, so in this case mode 4 (100) must be used.
which will time out at an accelerated rate of 64 times the
normal rate.
Test Bits TB0 to TB2 are located in C0, bits 0 to 2:
TB2
Bits X0 and X1 are located in FL, bits 0 and 1:
MOTOROLA ANALOG IC DEVICE DATA
X1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Various test modes can be enabled, by means of bits
In normal operation, the phase comparator pulls high if the
Switching in mode 0d will reset the transient delay counter,
0
0
0
0
1
1
1
1
TB1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X0
0
0
1
1
0
0
1
1
TB0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
State
0a
0a
0b
0b
0
0c
0d
0d
Table 1. Test Mode 1
Table 2. Test Mode 2
State
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
Function
Normal Operation with Non–Inverted
Charge Pump Polarity
Normal Inverted Operation (same as
mode 4), but Transient Output Inhibit
Disabled.
Normal Inverted Operation (same as
mode 4), but Transient Output Inhibit
Circuitry Forced (output disabled).
Normal Inverted Operation (same as
mode 4), but Transient Output Inhibit
counter Sped up (64 times).
Function
See Table Test Mode 2
Normal Operation, But Test
Pattern Geneartor Disabled
Upper Source On, Lower
Source Off
Lower Source On, Upper
Source Off
Normal Operation with
Inverted Charge Polarity
High Impedance
Test Ref divider on Upper
Source (F ref ), Lower Source Off
Test Progr. divider on Lower
Source (F out/2 ), Upper Source Off
MC44353 MC44354 MC44355
Sound Section Test Modes
responds to States 6 and 7 by placing the output of the sound
PLL programmable divider on the upper current source.
NOTE: 1. Bits SFD1–0 are located in C0 bits 4 and 3.
NOTE: Not to scale
a
The Sound PLL is tested in a similar fashion, and
–12
–16
SFD1
**0.3
–4
–8
0.86
0.72
0.58
0.44
*1.0
Figure 16. Noise Measurement/Weighting Filter
0
0
0
1
1
0
*100 IRE
** 1 IRE
Table 3. Sound Subcarrier Frequency
Figure 15. CCIR Test Line 330
SFD0
1
0
1
0
1
Approximately Characteristic of Standard
Independent Filter in conformity with CCIR Rec. 567
2
Sound Subcarrier Freq (MHz)
40
Step 0
f
1
3
MHz
2
4.5
5.5
6.0
6.5
3
4 5
4
11
5

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