at49bv320ct ATMEL Corporation, at49bv320ct Datasheet - Page 9

• Manufacturer Part Number: at49bv320ct
• Description: 32-megabit 2m X 16 3-volt Only Flash Memory
• Manufacturer: ATMEL Corporation

4.13
4.14
4.15
3372F–FLASH–4/05
Common Flash Interface (CFI)
Hardware Data Protection
Output Levels
B in the protection register, the two-bus cycle Program Protection Register command must be
used as shown in the
cycle Lock Protection Register command must be used as shown in the
Table”
ond bus cycle are don’t cares. To determine whether sector B is locked out, use the status of
sector B protection command. If data bit D1 is zero, sector B is locked. If data bit D1 is one, sec-
tor B can be reprogrammed. Please see the
for the address locations in the protection register. To read the protection register, the Product
ID Entry command is given followed by a normal read operation from an address within the pro-
tection register. After determining whether sector B is protected or not, or reading the protection
register, the Read command must be given to return to the read mode.
CFI is a published, standardized data structure that may be read from a flash device. CFI allows
system software to query the installed device to determine the configurations, various electrical
and timing parameters and functions supported by the device. CFI is used to allow the system to
learn how to interface to the flash device most optimally. The two primary benefits of using CFI
are ease of upgrading and second source availability. The command to enter the CFI Query
mode is a one-bus cycle command which requires writing data 98h to any address. The CFI
Query command can be written when the device is ready to read data or can also be written
when the part is in the product ID mode. Once in the CFI Query mode, the system can read CFI
data at the addresses given in
to the read mode, issue the Read command.
The Hardware Data Protection feature protects against inadvertent programs to the
AT49BV320C(T) in the following ways: (a) V
function is inhibited. (b) V
device will automatically time out 10 ms (typical) before programming. (c) Program inhibit: hold-
ing any one of OE low, CE high or WE high inhibits program cycles. (d) Program inhibit: V
less than V
tions are inhibited for 100 ns.
INPUT LEVELS: While operating with a 2.65V to 3.6V power supply, the address inputs and
control inputs (OE, CE and WE) may be driven from 0 to 5.5V without adversely affecting the
operation of the device. The I/O lines can only be driven from 0 to V
For the AT49BV320C(T), output high levels (V
- 3.6V output levels, V
lated to 2.0V ± 10%, while V
. Data bit D1 must be zero during the second bus cycle. All other data bits during the sec-
ILPP
. (e) V
PP
“Command Definition Table” on page
CCQ
power-on delay: once V
must be tied to V
CC
CC
power-on delay: once V
“Common Flash Interface Definition Table” on page
must be regulated to 2.65V - 3.0V (for minimum power).
CC
CC
“Protection Register Addressing Table” on page 16
. For 1.8V - 2.2V output levels, V
OH
sense: if V
PP
) are equal to V
has reached 0.9V, program and erase opera-
CC
has reached the V
CC
15. To lock out sector B, the two-bus
is below 1.8V (typical), the program
CCQ
AT49BV320C(T)
CCQ
- 0.1V (not V
+ 0.6V.
“Command Definition
CC
CCQ
sense level, the
CC
must be regu-
27. To return
). For 2.65V
PP
is
9