pkd01 Analog Devices, Inc., pkd01 Datasheet

no-image

pkd01

Manufacturer Part Number
pkd01
Description
Monolithic Peak Detector With Reset-and-hold Mode
Manufacturer
Analog Devices, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PKD01
Manufacturer:
Q-TECH
Quantity:
1
Part Number:
pkd01AY
Manufacturer:
SANKEN
Quantity:
310
Part Number:
pkd01AY
Quantity:
2 258
Part Number:
pkd01AY
Manufacturer:
ST
Quantity:
1 520
Part Number:
pkd01AY/883
Manufacturer:
NS
Quantity:
780
Part Number:
pkd01EP
Manufacturer:
NEC
Quantity:
450
Part Number:
pkd01EP
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
pkd01EY
Manufacturer:
NS
Quantity:
650
Part Number:
pkd01EY
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
pkd01FP
Manufacturer:
TI
Quantity:
87
Part Number:
pkd01FPZ
Manufacturer:
ENTROPIC
Quantity:
101
Part Number:
pkd01FPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
a
GENERAL DESCRIPTION
The PKD01 tracks an analog input signal until a maximum
amplitude is reached. The maximum value is then retained as a
peak voltage on a hold capacitor. Being a monolithic circuit, the
PKD01 offers significant performance and package density
advantages over hybrid modules and discrete designs without
sacrificing system versatility. The matching characteristics
attained in a monolithic circuit provide inherent advantages
when charge injection and droop rate error reduction are
primary goals.
Innovative design techniques maximize the advantages of mono-
lithic technology. Transconductance (g
over conventional voltage amplifier circuit building blocks. The
g
acquisition time and maximize circuit accuracy. Their outputs
are easily switched by low glitch current steering circuits. The
steered outputs are clamped to reduce charge injection errors
upon entering the hold mode or exiting the reset mode. The inher-
ently low zero-scale error is further reduced by active Zener-Zap
trimming to optimize overall accuracy.
m
amplifiers simplify internal frequency compensation, minimize
m
) amplifiers were chosen
The output buffer amplifier features an FET input stage to
reduce droop rate error during lengthy peak hold periods. A bias
current cancellation circuit minimizes droop error at high ambi-
ent temperatures.
Through the DET control pin, new peaks may either be detected
or ignored. Detected peaks are presented as positive output
levels. Positive or negative peaks may be detected without
additional active circuits, since Amplifier A can operate as an
inverting or noninverting gain stage.
An uncommitted comparator provides many application options.
Status indication and logic shaping/shifting are typical examples.
LOGIC
GND
DET
RST
–IN
+IN
–IN
+IN
RST
0
0
1
1
DET
with Reset-and-Hold Mode
0
1
1
0
+IN
Monolithic Peak Detector
FUNCTIONAL BLOCK DIAGRAM
OPERATIONAL MODE
PEAK DETECT
PEAK HOLD
RESET
INDETERMINATE
+
+
A
B
–IN
GATED
GATED
"g
AMP
"g
AMP
m
m
CMP
+
"
"
D
1
SWITCHES SHOWN FOR:
RST = “0,” DET = “0”
OUTPUT
C
H
OUTPUT
BUFFER
V–
+
PKD01
C
V+
PKD01
V–
OUTPUT

Related parts for pkd01

pkd01 Summary of contents

Page 1

... GENERAL DESCRIPTION The PKD01 tracks an analog input signal until a maximum amplitude is reached. The maximum value is then retained as a peak voltage on a hold capacitor. Being a monolithic circuit, the PKD01 offers significant performance and package density advantages over hybrid modules and discrete designs without sacrificing system versatility ...

Page 2

... A DET = 1 ± 11.5 ± 12 2.5 kΩ 2.5 kΩ Load ). The droop current vs. time (after power-on) curve clarified this point. Since J ) also. The warmed- PKD01A/E PKD01F Max Min Typ Max Unit 150 80 250 20 40 ...

Page 3

... SY ). The droop current vs. time (after power-on) curve clarifies this J ) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature. J ≤ +125 C for PKD01AY, –25 C ≤ ≤ +70 C for PKD01EP, PKD01FP, unless otherwise noted.) PKD01A/E PKD01F Min Typ ...

Page 4

... Storage Temperature Range PKD01AY, PKD01EY, PKD01FY . . . . . –65°C to +150°C PKD01EP, PKD01FP . . . . . . . . . . . . . . . –65°C to +125°C Operating Temperature Range PKD01AY . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C PKD01EY, PKD01FY . . . . . . . . . . . . . . . . –25°C to +85°C PKD01EP, PKD01FP . . . . . . . . . . . . . . . . . . . 0°C to 70°C Junction Temperature . . . . . . . . . . . . . . . . . –65°C to +150°C ...

Page 5

... Overdrive, 2 kΩ Pull-Up Resistor 2.5 kΩ The droop current vs. time (after power-on) curve clarifies this J ) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature. J PKD01 PKD01N Limit Unit 7 mV max 6 mV max 250 nA max 75 nA max 10 V/mV min 74 ...

Page 6

... PKD01–Typical Performance Characteristics INPUT + RANGE = V+ – +125 –55 C +25 C –2 +125 C –6 –10 V– SUPPLY –14 – SUPPLY VOLTAGE +V AND –V –V 1000 100 R = 10k 100 1k FREQUENCY – Hz 1.0 POLARITY OF ...

Page 7

... 1000pF 1000pF 1000pF 135 PHASE 180 0 – 100 1k 10k 100k 1M 10M FREQUENCY – Hz PKD01 10mV 1000pF H 100 90 DETECTED PEAK 10V 3kHz SINEWAVE 10 INPUT 0% 10mV 0V 100 TIME – 20 s/DIV 120 ...

Page 8

... PKD01 100 – 100 1k 10k 100k 1M 10M FREQUENCY – 1000pF 20mV 30 TO 2mV 20 TO 200mV INPUT STEP – DETECTED C = 1000pF PEAK 100 H +10V 90 RESET 0V – ...

Page 9

... FREQUENCY – Hz 110 100 –75 –50 – 100 125 150 TEMPERATURE – C PKD01 1 LOGIC 1 0 –55 C –1 +125 C +25 C –2 LOGIC 0 LOGIC GROUND = 0V –3 –2 – LOGIC INPUT VOLTAGE – ...

Page 10

... PKD01 +125 –55 C –2 +25 C –6 +125 C –10 V– –14 – SUPPLY VOLTAGE +V AND –V – V 1.0 0.8 +125 C 0.6 +25 C 0.4 0.2 – –0 – OUTPUT SINK CURRENT – PULL-UP RESISTOR = ...

Page 11

... When the moving pole is considered with the typical frequency compensation of voltage amplifiers however, there is a loop stability problem. The necessary compensation can increase the required acquisition time. ADI’s approach replaces the input voltage ampli- fier with a transconductance amplifier (see Figure 2). The PKD01 transfer function can be reduced to OUT ...

Page 12

... REPEAT NULL CIRCUIT FOR RESET BUFFER AMPLIFIER B IF REQUIRED. Amplifier A. Diode D m – R cause monitor the PKD01 IN OUT from Amplifier B. Set Amplifier B signal and monitor the PKD01 output. Set DET = DET 20k PKD01 B ...

Page 13

... BOTTOM VIEW The C terminal (Pin high impedance point. To minimize H gain errors and maintain the PKD01’s inherently low droop rate, guarding Pin 4 as shown in Figure 9 is recommended. COMPARATOR The comparator output high level ( set by external resis- OH tors possible to optimize noise immunity while interfacing to all standard logic families— ...

Page 14

... TO –4V) –10V 56k 18k 3 12 PKD01 36k –18V V+ V– PKD01 A GAIN = + GAIN = + 1000pF V+ V– 10k 10k 5% PKD01 A GAIN = + GAIN = –4 8. RST 1000pF OUTPUT OUTPUT ...

Page 15

... DIVIDER FOR BOTH INPUT AMPLIFIERS. NOTE: R1, R2, R3 AND R4 > 5k INPUT AMPLIFIER GAIN RESET AMPLIFIER GAIN PKD01 V+ V– OUTPUT PKD01 A GAIN = – GAIN = + 1000pF V+ V– OUTPUT PKD01 A GAIN = – GAIN = + 1000pF ...

Page 16

... DEVICE IS RESET TO 0 VOLTS. 2. DETECTED PEAKS ARE PRESENTED AS POSITIVE OUTPUT LEVELS 10k . DAC10 5V 2. INPUT A SIGNAL DET RST B RESET VOLTAGE 10k V – OP27 OUT 10k 10k 10k –15V OUTPUT PKD01 PEAK DETECTOR RESET 1000pF C H POLYSTYRENE R CMP R C PKD01 C H ...

Page 17

... DET PKD01 RST SLOPE = SLOPE = C ~0.5V/ s THE MAXIMUM FULL-SCALE CURRENT MUST BE LESS THAN 0.5mA. PKD01 5V INPUT RESET PEAK DETECT OUTPUT 2V 1ms NOTES: RESET VOLTAGE = –1.0V TRACE 1 = 2V/DIV TRACE 2 = 5V/DIV TRACE 3 = 2V/DIV BUFFERED RAMP OUTPUT RAMP SLOPE SELECTION 15V R > ...

Page 18

... PKD01 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead Plastic DIP (PDIP) (N-14) 0.795 (20.19) 0.725 (18.42 0.280 (7.11) 0.240 (6.10 0.325 (8.25) PIN 1 0.300 (7.62) 0.100 (2.54) 0.060 (1.52) BSC 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) 0.160 (4.06) MIN 0.115 (2.93) SEATING 0.022 (0.558) 0.070 (1.77) PLANE 0.014 (0.356) 0.045 (1.15) 14-Lead Cerdip (Q-14) 0.005 (0.13) MIN 0.098 (2.49) MAX ...

Related keywords