cop888fh National Semiconductor Corporation, cop888fh Datasheet
cop888fh
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cop888fh Summary of contents
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... COP888FH 8-Bit CMOS ROM Based Microcontrollers with 12k Memory, Comparators, USART and Hardware Multiply/Divide General Description The COP888FH Family of ROM based microcontrollers are highly integrated COP8 ™ Feature core devices with 12k memory and advanced features including Analog compara- tors, and Hardware Multiply/Divide. These single-chip ...
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... Single supply operation: 2.5V–5.5V n Temperature ranges: 0˚C to +70˚C, −40˚C to +85˚C −55˚C to +125˚C Development Support n Emulation and OTP devices n Real time emulation and full program debug offered by MetaLink Development System FIGURE 1. COP888FH Block Diagram 2 < 5 µA) DS012602-1 ...
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... COP888FH-XXX/V or COP988FH-XXX/V See NS Plastic Chip Package Number V44A Order Number COP684FH-XXX/M, COP884FH-XXX/M, See NS Molded Package Number M28B or N28B Dual-In-Line Package DS012602-2 Number COP688FH-XXX/N, COP888FH-XXX/N or COP988FH-XXX/N See NS Molded Package Number N40A Dual-In-Line Package DS012602-4 COP984FH-XXX/M, COP684FH-XXX/N, COP884FH-XXX/N or COP984FH-XXX/N FIGURE 2. Connection Diagrams ...
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Connection Diagrams Pinouts for 28-, 40- and 44-Pin Packages Port Type L0 I/O L1 I/O L2 I/O L3 I/O L4 I/O L5 I/O L6 I/O L7 I/O G0 I/O G1 WDOUT G2 I/O G3 I/O G4 I/O G5 I/O G6 ...
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COP98xFH Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin DC Electrical Characteristics COP98xFH: 0˚C T +70˚C unless otherwise ...
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DC Electrical Characteristics COP98xFH: 0˚C T +70˚C unless otherwise specified A Parameter Output Current Levels D Outputs Source Sink All Others Source (Weak Pull-Up Mode) Source (Push-Pull Mode) Sink (Push-Pull Mode) TRI-STATE Leakage Allowable Sink/Source Current per Pin D Outputs ...
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AC Electrical Characteristics COP98xFH: 0˚C T +70˚C unless otherwise specified A Parameter MICROWIRE ™ Setup Time (t ) UWS MICROWIRE Hold Time (t ) UWH MICROWIRE Output Propagation Delay (t Input Pulse Width Interrupt Input High Time Interrupt Input Low ...
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COP88xFH Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Electrical Characteristics COP88xFH: −40˚C T +85˚C unless otherwise specified A Parameter Operating ...
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DC Electrical Characteristics COP88xFH: −40˚C T +85˚C unless otherwise specified A Parameter Maximum Input Current without Latchup (Notes 11, 12) RAM Retention Voltage Input Capacitance Load Capacitance Electrical Characteristics COP88xFH: −40˚C T +85˚C unless otherwise ...
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COP68xFH Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin DC Electrical Characteristics COP68xFH: −55˚C T +125˚C unless otherwise ...
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AC Electrical Characteristics COP68xFH: −55˚C T +125˚C unless otherwise specified A Parameter Instruction Cycle Time ( Crystal Resonator or External CKI Clock Duty Cycle (Note 19) Rise Time (Note 19) Fall Time (Note 19) Inputs t SETUP t ...
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Pin Descriptions V and GND are the power supply pins. All V CC GND pins must be connected. CKI is the clock input. This can come from an R/C gener- ated oscillator crystal oscillator (in conjunction with CKO). ...
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Pin Descriptions (Continued) The Port I has the following alternate features. I6 COMP2OUT (Comparator 2 Output) I5 COMP2+IN (Comparator 2 Positive Input) I4 COMP2−IN (Comparator 2 Negative Input) I3 COMP1OUT (Comparator 1 Output) I2 COMP1+IN (Comparator 1 Positive Input) I1 ...
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Data Memory Segment RAM Extension (Continued) cated in the base segment. The stack pointer will be intitial- ized to point at data memory location 006F as a result of re- set. The 128 bytes of RAM contained in the base ...
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Oscillator Circuits (Continued) Table 1 shows the component values required for various standard crystal values. R/C OSCILLATOR By selecting CKI as a single pin oscillator input, a single pin R/C oscillator circuit can be connected to it. CKO is available ...
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Control Registers (Continued) LPEN L Port Interrupt Enable (Multi-Input Wakeup/ Interrupt) T0PND Timer T0 Interrupt pending T0EN Timer T0 Interrupt Enable (Bit 12 toggle) µWPND MICROWIRE/PLUS interrupt pending µWEN Enable MICROWIRE/PLUS interrupt T1PNDB Timer T1 Interrupt Pending Flag for T1B ...
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Timers (Continued) able flags, TxENA and TxENB, allow the interrupts from the timer underflow to be enabled or disabled. Setting the timer- enable flag TxENA will cause an interrupt when a timer un- derflow causes the RxA register to be ...
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Timers (Continued) FIGURE 10. Timer in Input Capture Mode The timer mode control bits (TxC3, TxC2 and TxC1) are detailed below: Mode TxC3 TxC2 ...
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Power Save Modes (Continued) tion (since CKO becomes a dedicated output), and so may be used with an RC clock configuration. The third method of exiting the HALT mode is by pulling the RESET pin low. Since a crystal or ...
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Multi-Input Wakeup (Continued low going high 1 = high going low The Multi-Input Wakeup feature utilizes the L Port. The user selects which particular L port bit (or combination of L Port bits) will cause the device to ...
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Multi-Input Wakeup (Continued) rupts and vice versa. A separate global pending flag is not needed since the register WKPND is adequate. Since Port L is also used for waking the device out of the HALT or IDLE modes, the user ...
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USART (Continued) USART CONTROL AND STATUS REGISTERS The operation of the USART is programmed through three registers: ENU, ENUR and ENUI. DESCRIPTION OF USART REGISTER BITS ENU-USART Control and Status Register (Address at 0BA) PEN PSEL1 XBIT9/ CHL1 CHL0 PSEL0 ...
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USART (Continued) ETI: This bit enables/disables interrupt from the transmitter section. Read/Write, cleared on reset. ETI = 0 Interrupt from the transmitter is disabled. ETI = 1 Interrupt from the transmitter is enabled. Associated I/O Pins Data is transmitted on ...
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USART Operation (Continued) USART INTERRUPTS The USART is capable of generating interrupts. Interrupts are generated on Receive Buffer Full and Transmit Buffer Empty. Both interrupts have individual interrupt vectors. Two bytes of program memory space are reserved for each inter- ...
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Baud Clock Generation FIGURE 15. USART BAUD Clock Divisor Registers TABLE 3. Prescaler Factors Prescaler Prescaler Select Factor 00000 NO CLOCK 00001 00010 1.5 00011 00100 2.5 00101 00110 3.5 00111 01000 4.5 01001 01010 5.5 01011 01100 6.5 01101 ...
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Baud Clock Generation The divide performed because in the asynchronous mode, the input frequency to the USART is 16 times the baud rate. The equation to calculate baud rates is given be- low. The actual Baud Rate ...
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Comparators (Continued) should also be disabled before entering either the HALT or IDLE modes in order to save power. The configuration of the CMPSL register is as follows: CMPSL REGISTER (ADDRESS X’00B7) Rsvd CMP20E CMP2RD CMP2EN CMP10E Bit 7 The ...
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Multiply/Divide (Continued) Register Name Multiplication Assignment (Address) Before Operation MDR1 (xx98) Unused MDR2 (xx99) Multiplier MDR3 (xx9A) MDR4 (xx9B) Low Byte of Multiplicand MDR5 (xx9C) High Byte of Multiplicand Interrupts Introduction Each device supports thirteen vectored interrupts. Interrupt sources include ...
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Interrupts (Continued) MASKABLE INTERRUPTS All interrupts other than the Software Trap are maskable. Each maskable interrupt has an associated enable bit and pending flag bit. The pending bit is set to 1 when the interrupt condition occurs. The state of ...
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Interrupts (Continued) ample, if the Software Trap routine is located at 0310 Hex, then the vector location 0yFE and -0yFF should contain the data 03 and 10 Hex, respectively. When a Software Trap in- terrupt occurs and the VIS instruction ...
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Interrupts (Continued) Figure 17 illustrates the different steps performed by the VIS instruction. Figure 18 shows a flowchart for the VIS instruc- tion. The non-maskable interrupt pending flag is cleared by the RPND (Reset Non-Maskable Pending Bit) instruction (under certain ...
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Interrupts (Continued) Programming Example: External Interrupt PSW =00EF CNTRL =00EE RBIT 0,PORTGC RBIT 0,PORTGD SBIT IEDG, CNTRL SBIT EXEN, PSW SBIT GIE, PSW WAIT: JP WAIT . . . .=0FF VIS . . . .=01FA .ADDRW SERVICE . . INT_EXIT: ...
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Interrupts (Continued) NON-MASKABLE INTERRUPT Pending Flag There is a pending flag bit associated with the non-maskable interrupt, called STPND. This pending flag is not memory- mapped and cannot be accessed directly by the software. The pending flag is reset to ...
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WATCHDOG The device contains a WATCHDOG and clock monitor. The WATCHDOG is designed to detect the user program getting stuck in infinite loops resulting in loss of program control or “runaway” programs. The Clock Monitor is used to detect the ...
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WATCHDOG Operation • The initial WATCHDOG service must match the key data value in the WATCHDOG Service register WDSVR in or- der to avoid a WATCHDOG error. • Subsequent WATCHDOG services must match all three data fields in WDSVR in ...
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MICROWIRE/PLUS (Continued) Key Data Match Don’t Care Mismatch Don’t Care Don’t Care Don’t Care TABLE 10. MICROWIRE/PLUS Master Mode Clock Select SL1 SL0 Where t ...
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MICROWIRE/PLUS (Continued) FIGURE 20. MICROWIRE/PLUS Application 37 DS012602-23 www.national.com ...
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Memory Map All RAM, ports and registers (except A and PC) are mapped into data memory address space. Address Contents S/ADD REG 0000 to 006F On-Chip RAM bytes (112 bytes) 0070 to 007F Unused RAM Address Space (Reads As All ...
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Addressing Modes There are ten addressing modes, six for operand addressing and four for transfer of control. OPERAND ADDRESSING MODES Register Indirect This is the “normal” addressing mode. The operand is the data memory addressed by the B pointer or ...
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Instruction Set (Continued) INSTRUCTION SET ADD A,Meml ADD ADC A,Meml ADD with Carry SUBC A,Meml Subtract with Carry AND A,Meml Logical AND ANDSZ A,Imm Logical AND Immed., Skip if Zero OR A,Meml Logical OR XOR A,Meml Logical EXclusive OR IFEQ ...
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Instruction Set (Continued) JSRL Addr. Jump SubRoutine Long JSR Addr Jump SubRoutine JID Jump InDirect RET RETurn from subroutine RETSK RETurn and SKip RETI RETurn from Interrupt INTR Generate an Interrupt NOP No OPeration [SP] PL, [SP−1] PU,SP− ...
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Instruction Execution Time Most instructions are single byte (with immediate addressing mode instructions taking two bytes). Most single byte instructions take one cycle time to execute. Skipped instructions require x number of cycles to be skipped, where x equals the ...
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Instruction Execution Time (Continued) 3–0 Bits 43 www.national.com ...
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Mask Options The mask programmable options are shown below. The op- tions are programmed at the same time as the ROM pattern submission. OPTION 1: CLOCK CONFIGURATION = 1 Crystal Oscillator(CKI/10) G7 (CKO) is clock generator output to crystal/resonator CKI ...
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... COP8-NSASM, COP8C, and WCOP8 IDE.) • COP8-UTILS: Free set of COP8 assembly code ex- amples, device drivers, and utilities to speed up code de- velopment. TOOLS ORDERING NUMBERS FOR THE COP888FH FAMILY DEVICES Vendor Tools National COP8-NSEVAL COP8-NSEVAL ...
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Development Tools Support WHERE TO GET TOOLS Tools are ordered directly from the following vendors. Please go to the vendor’s web site for current listings of distributors. Vendor Home Office Aisys U.S.A.: Santa Clara, CA 1-408-327-8820 fax: 1-408-327-8830 Byte Craft ...
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Physical Dimensions inches (millimeters) unless otherwise noted Molded SO Wide Body Package (M) Order Number COP684FH-XXX/M, COP884FH-XXX/M or COP984FH-XXX/M NS Package Number M28B Molded Dual-In-Line Package (N) Order Number COP684FH-XXX/N, COP884FH-XXX/N or COP984FH-XXX/N NS Package Number N28B 47 www.national.com ...
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... Physical Dimensions www.national.com inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package (N) Order Number COP688FH-XXX/N, COP888FH-XXX/N or COP988FH-XXX/N NS Package Number N40A Plastic Leaded Chip Carrier (V) Order Number COP688FH-XXX/V, COP888FH-XXX/V or COP988FH-XXX/V NS Package Number V44A 48 ...
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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...