ak4372 ETC-unknow, ak4372 Datasheet - Page 52

• Manufacturer Part Number: ak4372
• Description: Dac With Built-in Pll & Hp-amp
• Manufacturer: ETC-unknow

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MS0684-E-02
Addr
00H
Register Definitions
PMVCM: Power Management for VCOM Block
PMDAC: Power Management for DAC Blocks
PMHPL: Power Management for the left channel of the headphone-amp
PMHPR: Power Management for the right channel of the headphone-amp
MUTEN: Headphone Amp Mute Control
PMLO: Power Management for Stereo Output
PMPLL: Power Management for PLL
Each block can be powered-down respectively by writing “0” in each bit of this address. When the PDN pin is “L”,
all blocks are powered-down regardless of setting of this address. In this case, register is initialized to the default
value.
When PMVCM, PMDAC, PMHPL, PMHPR, PMLO, PMMO, PMPLL and MCKO bits are “0”, all blocks are
powered-down. The register values remain unchanged. Power supply current is 20μA(typ) in this case. For fully
shut down (typ. 1μA), the PDN pin should be “L”.
Register Name
Power Management 0
Default
0: Power OFF (default)
1: Power ON
0: Power OFF (default)
1: Power ON
When the PMDAC bit is changed from “0” to “1”, the DAC is powered-up to the current register values
(ATT value, sampling rate, etc).
0: Power OFF (default). The HPL pin settles to VSS1(0V).
1: Power ON
0: Power OFF (default). The HPR pin settles to VSS1(0V).
1: Power ON
0: Mute (default). The HPL and HPR pins settles to VSS1(0V).
1: Normal operation. HPL and HPR pins go to 0.475 x AVDD.
0: Power OFF (default) LOUT/ROUT pins change to Hi-Z.
1: Power ON
0: Power OFF: EXT mode (default)
1: Power ON: PLL mode
R/W
RD
D7
0
0
PMPLL
R/W
D6
0
PMLO
- 52 -
R/W
D5
0
MUTEN
R/W
D4
0
PMHPR
R/W
D3
0
PMHPL
R/W
D2
0
PMDAC
R/W
D1
0
[AK4372]
PMVCM
2008/12
R/W
D0
0