xrt73r06 Exar Corporation, xrt73r06 Datasheet - Page 39

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xrt73r06

Manufacturer Part Number
xrt73r06
Description
Six Channel Ds3/e3 Line Interface Unit Liu With R3 Technologytm
Manufacturer
Exar Corporation
Datasheet

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SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
When the LOS condition is declared, the clock recovery circuit locks into the reference clock applied to the
internal master clock outputs this clock onto the RxClk_n output pin. The data on the RxPOS_n and RxNEG_n
pins can be forced to zero by setting the LOSMUT_n bits in the individual channel control register to “1”.
N
The decoder block takes the output from the clock and data recovery block and decodes the B3ZS (for DS3 or
STS-1) or HDB3 (for E3) encoded line signal and detects any coding errors or excessive zeros in the data
stream. Whenever the input signal violates the B3ZS or HDB3 coding sequence for bipolar violation or
contains three (for B3ZS) or four (for HDB3) or more consecutive zeros, an active “High” pulse is generated on
the RLCV_n output pins to indicate line code violation.
4.6
4.5.5
OTE
SYMBOL
RxClk
t
t
t
LCVO
t
RRX
FRX
CO
: When the LOS condition is cleared, the recovered data is output on RxPOS_n and RxNEG_n pins.
B3ZS/HDB3 Decoder
Duty Cycle
RxClk Frequency
E3
DS-3
STS-1
RxClk rise time (10% o 90%)
RxClk falling time (10% to 90%)
RxClk to RPOS/RNEG delay time
RxClk to rising edge of LCV output delay
Muting the Recovered Data with LOS condition:
RPOS or
RNEG
RxClk
LCV
F
IGURE
25. R
t
CO
PARAMETER
t
RRX
t
LCVO
ECEIVER
D
ATA OUTPUT AND CODE VIOLATION TIMING
t
FRX
36
MIN
45
34.368
44.736
51.84
TYP
2.5
50
2
2
MAX
55
4
4
4
XRT73R06
REV. 1.0.0
UNITS
MHz
MHz
MHz
ns
ns
ns
ns
%

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