xrt73r06 Exar Corporation, xrt73r06 Datasheet - Page 51

• Manufacturer Part Number: xrt73r06
• Description: Six Channel Ds3/e3 Line Interface Unit Liu With R3 Technologytm
• Manufacturer: Exar Corporation

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SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
Whether the LIU is configured for Asynchronous or Synchronous mode, the following descriptions apply. The
synchronous mode requires an input clock (PCLK) to be used as the microprocessor timing reference. Read
and Write operations are described below.
Read Cycle (For Pmode = "0" or "1")
Whenever the local µP wishes to read the contents of a register, it should do the following.
Write Cycle (For Pmode = "0" or "1")
Whenever a local µP wishes to write a byte or word of data into a register within the LIU, it should do the follow-
ing.
1. Place the address of the target register on the address bus input pins Addr[7:0].
2. While the µP is placing this address value on the address bus, the address decoding circuitry should
3. Next, the µP should indicate that this current bus cycle is a Read operation by toggling the RD input pin
4. After the µP toggles the Read signal "Low", the LIU will toggle the RDY output pin "Low". The LIU does this
5. After the µP detects the RDY signal and has read the data, it can terminate the Read Cycle by toggling the
6. The CS input pin must be pulled "High" before a new command can be issued.
1. Place the address of the target register on the address bus input pins Addr[7:0].
2. While the µP is placing this address value on the address bus, the address decoding circuitry should
3. The µP should then place the byte or word that it intends to write into the target register, on the bi-direc-
4. Next, the µP should indicate that this current bus cycle is a Write operation by toggling the
5. After the µP toggles the Write signal "Low", the LIU will toggle the RDY output pin "Low". The LIU does this
6. The CS input pin must be pulled "High" before a new command can be issued.
7.2 A
assert the CS pin of the LIU, by toggling it "Low". This action enables communication between the µP and
the LIU microprocessor interface block.
"Low". This action enables the bi-directional data bus output drivers of the LIU.
to inform the µP that the data is available to be read by the µP , and that it is ready for the next command.
RD input pin "High".
assert the CS pin of the LIU, by toggling it "Low". This action enables communication between the µP and
the LIU microprocessor interface block.
tional data bus D[7:0].
"Low". This action enables the bi-directional data bus input drivers of the LIU.
to inform the µP that the data has been written into the internal register location, and that it is ready for the
next command.
SYNCHRONOUS AND
S
YNCHRONOUS
D
ESCRIPTION
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WR
XRT73R06
REV. 1.0.0
input pin