wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 55

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

Pre-Production
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Figure 38 TDM with Processor as Master
Note: The WM9081 is a 24-bit device. If the user operates the WM9081 in 32-bit mode then the 8
LSBs will be ignored by the DAC. To ensure the DACDAT line is never left floating (eg. when using a
mixture or 24-bit and 32-bit devices), it is recommended to add a pull-down resistor to the DACDAT
line.
BCLK FREQUENCY
The BCLK frequency is controlled relative to CLK_SYS by the BCLK_DIV divider. Internal clock
divide and phase control mechanisms ensure that the BCLK and LRCLK edges will occur in a
predictable and repeatable position relative to each other and relative to the data for a given
combination of DAC sample rate and BCLK_DIV settings.
BCLK_DIV is defined in the “Digital Audio Interface Control “section. See also “Clocking and Sample
Rates” section for more information.
AUDIO DATA FORMATS (NORMAL MODE)
In Right Justified mode, the LSB is available on the last rising edge of BCLK before a LRCLK
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each LRCLK transition.
Figure 39 Right Justified Audio Interface (assuming n-bit word length)
PP, Rev 3.0, April 2009
WM9081
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