wm9704q Wolfson Microelectronics plc, wm9704q Datasheet - Page 12

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wm9704q

Manufacturer Part Number
wm9704q
Description
4-channel Surround Sound Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM9704Q
QUAD MODE
REVISION 2.1 COMPLIANT 6-CHANNEL I
WOLFSON MICROELECTRONICS LTD
In this mode the additional 2 DAC channels are enabled, using the line level output pins 39 and 41 as
outputs. An additional mixer block in this path allows the analogue mix, excluding the front DAC
channels, to be summed into the rear channel mix. Additional gain controls (PGAs) are provided to
allow adjustment of front and rear mix levels separately (registers 72h and 74h) prior to summing the
analogue mix to these channels. The rear channel DACs also are gain adjustable using register 70h.
This function duplicates the features that are provided for the front DAC channel (gain range, step
size etc).
Features in this mode are as follows:
In this mode the device now has 6-channel support and GPIO capability. Rear and LFE centre DAC
data is mapped onto the GPIO output pins as I
the I
Features in this mode are as follows:
2
S enable bit is set in register 5Ah. Enabling of I
Vendor ID reads back WML4.
All 6 audio channels are flagged as supported (if I
Headphone channel flagged as not supported (bit ID4 in register 00h).
4 channels of DAC and 2 of ADC conversion available, with all recommended Audio and
modem sample rates supported via the audio sample rate registers 2Ch (front channels; slots
3 and 4), 2Eh (rear channels; slots 7 and 8) and 32h (ADCs) (Note if ID is selected as 11,
register 30h is used for sample rate of LFE channel; slot 9).
GPIO capability supporting Bits 11 to 13 is flagged as supported.
Master/slave ID0/1 are supported, with automatic re-mapping of the rear or LFE/centre DAC
slot data onto the rear DACs when ID 10 or 11 are selected (normally surround slots are
mapped onto the rear DACs).
LFE and Center channel data, plus a duplicate of the rear channel data, is sent from the
GPIO pins in I
Headphone/line level outputs are used to output the rear DAC and mixer channel, with volume
controlled from register 38h.
Wolfson 3D stereo enhancement supported.
Master volume control register maps to the location dependant on selected ID: (ID 00 or 01
uses master volume at register 02h, ID 10 uses 38h (surround volume) and ID11 uses 36h
(LFE, Center volume) In this case, bits 7 and 15 act as left and right mute.).
DAC mute (reg18h) automatically de-muted, when ID is 1x, i.e. used as surround DAC or
LFE/center, when surround or LFE/center master volume is de-muted.
In order to achieve the above functionality, the following changes to the Revision 2.1 compliant
defaults are made.
Revision 2.1 legacy compliance switch is opened (can be closed using REV2SW bit in register
5Ah).
Rear channel mixer PGA default is now not-muted, 0dB gain (same as front channel mixer).
LNLVL pin volume control is now controlled from 02h unless ID=IO when volume control is
from 38h.
Rear DAC level set by register 70h, default is 0dB not-muted.
Front mixer and rear mixer gains set in registers 72h and 74h.
Vendor ID reads back as WML3.
2 channels of ADC and DAC conversion provided.
Rear and LFE/centre DAC slots are flagged as supported in extended audio capability
register 28h.
GPIO capability supporting bits 11-13 is flagged as supported.
Master/slave ID0/1 are supported.
Surround audio data not sent to the DACs is sent from the GPIO pins in I
rate (no variable rates supported by the I
Headphone/line level outputs duplicating the main outputs are supported, with gain control from
register 04h.
Wolfson 3D stereo enhanced sound supported.
Master volume control register maps to the location dependant on selected ID: (ID 00 or 01
uses master volume at register 02h, ID 10 uses 38h (surround volume) and ID11 uses 36h
(LFE, Centre volume) In this case, bits 7 and 15 act as left and right mute.).
2
S format, at 48ks/s rate (no variable rates supported by the I
2
S MODE
2
2
S data when these data slots are tagged as valid, and
S outputs).
2
S overrides the GPIO function.
2
S enable bit is set).
2
PD Rev 2.3 January 2001
S format, at 48ks/s
2
S outputs).
Production Data
12

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