ht82k68a Holtek Semiconductor Inc., ht82k68a Datasheet - Page 14

• Manufacturer Part Number: ht82k68a
• Description: Ht82k68a -- Multimedia Keyboard Encoder 8-bit Mask Mcu
• Manufacturer: Holtek Semiconductor Inc.

Input/Output Ports
There are 32 bidirectional input/output lines in the
HT82K68A, labeled from PA to PE, which are mapped to
the data memory of [12H], [14H], [16H], [18H] and [1AH]
respectively. All these I/O ports can be used for input and
output operations. For input operation, these ports are
non-latching, that is, the inputs must be ready at the T2
rising edge of instruction MOV A,[m] (m=12H, 14H, 16H,
18H or 1AH). For output operation, all data is latched and
remains unchanged until the output latch is rewritten.
Each I/O line has its own control register (PAC, PBC, PCC,
PDC, PEC) to control the input/output configuration. With
this control register, CMOS output or Schmitt trigger input
with or without pull-high resistor (mask option) structures
can be reconfigured dynamically (i.e., on-the-fly) under
software control. To function as an input, the correspond-
ing latch of the control register must write 1 . The
pull-high resistance will exhibit automatically if the
pull-high option is selected. The input source(s) also de-
pend(s) on the control register. If the control register bit is
bus. The latter is possible in read-modify-write instruc-
tion. For output function, CMOS is the only configuration.
These control registers are mapped to locations 13H, 15H,
17H, 19H and 1BH.
Rev. 1.70
1 , input will read the pad state. If the control register bit is
0 , the contents of the latches will move to the internal
Input/Output Ports
14
After a chip reset, these input/output lines stay at high
levels or floating (mask option). Each bit of these in-
put/output latches can be set or cleared by the SET
[m].i or CLR [m].i (m=12H, 14H, 16H, 18H or 1AH) in-
struction.
Some instructions first input data and then follow the
output operations. For example, the SET [m].i , CLR
[m].i , CPL [m] and CPLA [m] instructions read the
entire port states into the CPU, execute the defined op-
erations (bit-operation), and then write the results back
to the latches or the accumulator.
Each line of port A and port C [0:3] has the capability to
wake-up the device.
PC2 is shared with the external interrupt pin, PE2~PE4
is defined as CMOS output pins only. PE0 can deter-
mine whether the high to low transition, or the low to
high transition of PC2 to activate the external subrou-
tine, when PE0 output high, the low to high transition of
PC2 to trigger the external subroutine, when PE0 output
low, the high to low transition of PC2 to trigger the exter-
nal subroutine.
PE2~PE4 is configured as CMOS output only and is
used to drive the LED. PC0, PC1 is configured as
NMOS open drain output with 4.6k
such that it can easy to use as DATA or CLOCK line of
PS2 keyboard application.
December 26, 2005
HT82K68A
pull-high resistor