m52s32321a Elite Semiconductor Memory Technology Inc., m52s32321a Datasheet - Page 23

• Manufacturer Part Number: m52s32321a
• Description: 512k X 32bit X 2banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

D Q
ESMT
Burst Read Single bit Write Cycle @Burst Length=2
A 1 0 / A P
*Note:1.BRSW modes is enabled by setting A9 “High” at MRS(Mode Register Set).
Elite Semiconductor Memory Technology Inc.
C L O C K
A D D R
D Q M
C K E
R A S
C A S
C L = 2
C L = 3
W E
B A
C S
2.When BRSW write command with auto precharge is executed, keep it in mind that t
At the BRSW Mode, the burst length at write is fixed to “1” regardless of programmed burst length.
Auto precharge is executed at the next cycle of burst-end, so in the case of BRSW write command, the precharge
command will be issued after two clock cycles.
R o w A c t i v e
* N o t e 1
( A - B a n k )
R A a
R A a
( A - B a n k )
W r i t e
D A a 0
D A a 0
C A a
Row Active
(B-Bank)
R B b
R B b
Auto Precharge
Read with
(A-Bank)
C A b
Q A b 0
Q A b 0
Q A b 1
H I G H
Q A b 1
R o w A c t i v e
( A - B a n k )
R A c
R A c
A u t o P r e c h a r g e
W r i t e w i t h
( B - B a n k )
D B c 0
D B c 0
C B c
* N o t e 2
RAS
Revision : 1.5
Publication Date : Jan. 2009
( A - B a n k )
should not be violated.
R e a d
C A d
M52S32321A
Q A d 0 Q A d 1
Q A d 0 Q A d 1
P r e c h a r g e
( A - B a n k )
: D o n ' t C a r e
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