m52s32321a Elite Semiconductor Memory Technology Inc., m52s32321a Datasheet - Page 6

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m52s32321a

Manufacturer Part Number
m52s32321a
Description
512k X 32bit X 2banks Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
CLK cycle time
CLK to valid
output delay
CLK to output in
Hi-Z
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
ESMT
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Note: 1.Parameters depend on programmed CAS latency.
CLK to valid
output delay
Output data hold time
CLK to output in
Hi-Z
Note: 4. Special condition (Output Load ≤ 10 ohm+10 pF)
Elite Semiconductor Memory Technology Inc.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to the
parameter.
Parameter
Parameter
CAS Latency =3
CAS Latency =2
CAS Latency =3
CAS Latency =2
CAS Latency =2
CAS Latency =3
CAS Latency =3
CAS Latency =2
CAS Latency =3
CAS Latency =2
Symbol
Symbol
t
t
t
t
t
t
t
t
t
SAC
SHZ
SLZ
t
t
CC
OH
CH
SS
SH
CL
t
SAC
SHZ
OH
Min
2
-
-
-
-
Min
1.5
10
6
2
2
2
2
1
-
-
-
-
-6
-6
Max
5.5
5.5
5.5
5.5
-
1000
Max
6
6
6
6
-
-
-
-
-
-
*All AC parameters are measured from half to half.
Unit
ns
ns
ns
Min
7.5
2.5
2.5
1.5
12
2
2
1
-
-
-
-
Note
-7.5
4
4
4
1000
Max
10
7
6
9
-
-
-
-
-
-
Revision : 1.5
Publication Date : Jan. 2009
Min
M52S32321A
2.5
2.5
1.5
15
9
2
2
1
-
-
-
-
-10
1000
Max
10
10
8
7
-
-
-
-
-
-
6/29
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
1
2
3
3
3
3
2
-

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