f25l32qa Elite Semiconductor Memory Technology Inc., f25l32qa Datasheet - Page 26

• Manufacturer Part Number: f25l32qa
• Description: 3v Only 32 Mbit Serial Flash Memory With Dual And Quad
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
Chip Erase
The Chip Erase instruction clears all bits in the device to FFH. A
Chip Erase instruction will be ignored if any of the memory area is
protected. Prior to any Write operation, the Write Enable (WREN)
instruction must be executed. CE must remain active low for
the duration of the Chip-Erase instruction sequence. The Chip
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows reading of
the status register. The status register may be read at any time
even during a Write (Program/Erase) operation. When a Write
operation is in progress, the BUSY bit may be checked before
sending any new commands to assure that the new commands
are properly received by the device.
Elite Semiconductor Memory Technology Inc.
CE must be driven low before the RDSR instruction is entered
Figure 19: Chip Erase Sequence
Figure 20: Read Status Register (RDSR-1 or RDSR-2) Sequence
SCK
CE
SO
SI
MODE0
MODE3
MSB
0
HIGH IMPEDANCE
1
2
SCK
SO
CE
05 or 35
SI
3
(Preliminary)
MODE0
MODE3
4
5
MSB
HIGH IMPENANCE
6
0 1 2 3 4 5 6 7
7
MSB
60 or C7
Erase instruction is initiated by executing an 8-bit command, 60H
or C7H. CE must be driven high before the instruction is
executed. The user may poll the BUSY bit in the Software Status
Register or wait T
Chip Erase cycle. See Figure 19 for the Chip Erase sequence.
and remain low until the status data is read. The RDSR-1
instruction code is “05H” for Status Register-1 and RDSR-2
instruction code is “35H” for Status Register-2. Read Status
Register is continuous with ongoing clock cycles until it is
terminated by a low to high transition of the CE . See Figure 20
for the RDSR instruction sequence.
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
8
Status Register -1 or -2 Data Out
9
10
11
CE
12
for the completion of the internal self-timed
13
Publication Date: Jan. 2009
Revision: 0.2
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