uc1602i-pp-m ETC-unknow, uc1602i-pp-m Datasheet - Page 12

• Manufacturer Part Number: uc1602i-pp-m
• Description: Single-chip, Ultra-low Power Passive Matrix Lcd Controller-driver
• Manufacturer: ETC-unknow

U
High-Voltage Mixed-Signal IC
LCD V
M
Two multiplex rates are supported in UC1602I: 65
or 49. The default is 65 and it can be changed by
programming.
B
Bias Ratio ( BR ) is defined as the ratio between
V
SEG data signal and its value is | V
The optimum Bias Ratio can be calculated by:
UC1602I supports four bias ratios as below.
BR and MR can both be changed dynamically by
software programming.
V
V
V
(Gain), PM (Potential Meter), TC (Temperature
Compensation) with the following relationship:
where V
Potential Meter. The maximum value for V
depends on the value of V
should be kept under 1.2V.
The value of V
The value of Gain is controlled by GN[1:0]. Their
relationship is shown below:
V
V
voltage. V
temperature cools down.
Four (4) different temperature compensated V
can be selected via pin wiring. The compensation
coefficient is given by the following table:
10
LCD
D
D
D
REF
REF
IAS
ULTIPLEX
LTRA
G
is generated internally by UC106. The value of
is determined by three control registers: GN
ENERATION
S
T
and V
is a temperature compensated reference
Bias Ratio
EMPERATURE
ELECTION
GN[1:0]
PM
OLTAGE
V
V
BR
Gain
C
REF
D
PM
R
D
is the output of an internal Electronic
Table 3: Gain vs. GN value
, i.e. BR = V
Table 2: BR vs. Mux rates
HIP
ATES
=
=
increases automatically as ambient
PM
Gain
600
is given by:
1.35
1200
00
C
S
+
Mux
0
6
×
OMPENSATION
ETTINGS
PM
V
PM
LCD
1.49
+
01
×
DD2
1
/V
1
7
V
REF
. At V
D
, where V
1.64
10
2
8
DD2
B1+
1.81
= 2.4V, V
– V
11
D
is the
3
9
B1–
D
|
REF
D
For all TC values, V
25
V
V
pump or by external power supply. The source of
V
When V
the following relationship with V
Given V
When PM=0, then equation (1) becomes:
L
UC106’s drivers and power supply circuits are
designed to handle panel capacitance load of
25nF at V
UC1602I load driving strength is sensitive to ITO
impedance of power supply circuits (V
V
of these ITO traces for COG applications.
P
UC1602I has built-in charge pump with on-chip
pumping capacitors. The number of pump stages
used can be programmed by setting PC[2:1]
register. Make sure the chip is in Reset mode
before changing the value of PC[2:0].
Given the same display quality, the lower the
PC[2:1] setting the more efficient is UC1602I, but
the weaker is the driving strength. In application,
designer is recommended to verify the design
with the highest setting first before trying lower
settings to achieve better efficiency.
Due to the use of fully embedded power supply,
built-in power ready detector, and drain circuit,
there is no rigid power up or power down
sequences for UC1602I controllers when using
internal V
On the other hand, caution must be exercised
when external V
rule of thumb is to make sure Display Enable is
V
OAD
LCD
LCD
LCD
B0/B1
OWER
LCD
V
o
C.
LCD
% per
S
may be supplied either by internal charge
is controlled by PC[2:1].
TC[1:0]
, V
D
Table 4: Temperature Compensation
≅
V
ELECTION
RIVING
S
≅
LCD
LCD
REF
BiasRatio
LCD
UPPLY
LCD
LCD
BiasRatio
o
= 1.2V at 25
.) Be sure to minimize the resistance
is generated internally its value has
=
C
=9V when V
generator.
BiasRatio
S
TRENGTH
C
LCD
ONFIGURATION
0.0
×
0
REF
source is used. The general
×
Gain
Gain
are normalized to 1.2V at
×
o
–0.05
V
DD2
C, V
×
D
×
1
600
>= 2.4V.
0
LCD
Product Specifications
1200
6 .
D
+
:
–0.10
becomes:
PM
2
DD2
×
1
2 .
, V
–0.20
©2000
(1b)
3
SS2
(1)
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