uc1602i-pp-m ETC-unknow, uc1602i-pp-m Datasheet - Page 16

• Manufacturer Part Number: uc1602i-pp-m
• Description: Single-chip, Ultra-low Power Passive Matrix Lcd Controller-driver
• Manufacturer: ETC-unknow

U
High-Voltage Mixed-Signal IC
S
UC1602I supports two serial modes, 4-wire mode
(PS=0), and 2-wire I
of interface is determined during power-up
process by the value of PS[1:0].
4-
Only write operations are supported in 4-wire
serial mode. Pin CS[1-0] are used for chip select
and bus cycle reset. Pin CD is used to determine
2-
When PS[1-0] is set to “LH”, UC1602I is
configured as a slave receiver/transmitter, for
industry standard I
Each UC1602I I
a START condition (S) from the bus master,
followed by a sequence header, containing a
device address, the direction of transfer (RW,
The direction and content of the bytes following
each header byte are fixed for the sequence. To
change the direction (R
(C
new header.
After receiving the header, the UC1602I will send
out an acknowledge signal (A). Then, depends
on the setting of the header, the transmitting
device (either the bus master or UC1602I) will
14
ERIAL
WIER
WIRE
LTRA
D), start a new interface sequence with a
CS1/0
SDI
SCK
CD
S
S
I
NTERFACE
ERIAL
ERIAL
C
Read Mode
Write Mode
MPU
HIP
MPU
S 0 1 1 1
S 0 1 1 1
⇓
⇓
I
I
NTERFACE
NTERFACE
2
C interface sequence starts with
2
C serial interface.
2
C mode (PS=1). The mode
(S8)
(I
A
A
1
1
W) or the content type
2
C)
A
A
0
0
C
D
C
D
0 A
1 A
D7
MPU
MPU
⇑
⇓
Figure 6: 4-wire Serial Interface (S8)
D
D
7
7
Figure 7 : 2-wire interface protocol
D6
D5
D4
D
D
MPU
0
MPU
0
⇑
A
⇓
A
D3
the content of the data been transferred. On each
write cycle, 8 bits of data, MSB first, are latched
on eight (8) rising SCK edges into an 8-bit data
holder. If CD=0, the data byte will be decoded as
command. If CD=1, this 8-bit will be treated as
data and transferred to proper address in the
Display Data RAM at the rising edge of the last
SCK pulse.
Pin CD is examined when SCK is pulled low for
the LSB (D0) of each token.
0:Write, 1:Read) and mode of transfer (CD,
0:Control, 1:Data).
In this mode, CS[1:0] become A[1:0] and are
used to configure UC1602I’s device address.
WR[1:0] and CD are not used and may be
connected to GND.
start placing data bits on the serial bus, MSB to
LSB, and the sequence will repeat until a STOP
signal (P, in WRITE), or a Not Acknowledge (N,
in READ mode) is sent by the bus master.
Note that, for data read (CD=1), the first byte of
data is dummy.
… ...
… ...
D2
D1
MPU
MPU
⇑
⇓
A
A
D0
D7
D6
Product Specifications
D5
MPU
MPU
⇑ ⇓
A P
⇓ ⇓
N P
©2000