adf5002 Analog Devices, Inc., adf5002 Datasheet - Page 5

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adf5002

Manufacturer Part Number
adf5002
Description
4 Ghz To 18 Ghz Divide-by-8 Prescaler Adf5002
Manufacturer
Analog Devices, Inc.
Datasheet

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1, 3, 4, 5, 8, 9,
12, 13, 16
2
6
7
10
11
14
15
Mnemonic
GND
RFIN
NC
CE
RFOUT
RFOUT
VDD2
VDD1
EPAD
Description
RF Ground. All ground pins should be tied together.
Single-Ended 50 Ω Input to the RF Prescaler. This pin is ac-coupled internally via a 3 pF capacitor.
No Connect. This pin can be left unconnected.
Chip Enable. This pin is active high. When CE is brought low, the part enters power-down mode. If this
functionality is not required, the pin can be left unconnected because it is pulled up internally through
a weak pull-up resistor.
Divided-Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied to VDD2 and an
ac-coupling capacitor of 1 pF.
Complementary Divided-Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied
to VDD2 and an ac-coupling capacitor of 1 pF.
Voltage Supply for the Output Stage. This pin should be decoupled to ground with a 0.1 μF capacitor in
parallel with a 10 pF capacitor and can be tied directly to VDD1.
Voltage Supply for the Input Stage and Divider Block. This pin should be decoupled to ground with a
0.1 μF capacitor in parallel with a 10 pF capacitor.
The LFCSP has an exposed paddle that must be connected to GND.
RFIN
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PADDLE MUST BE
GND
GND
GND
CONNECTED TO GND.
1
2
3
4
Figure 2. Pin Configuration
Rev. 0 | Page 5 of 12
(Not to Scale)
ADF5002
TOP VIEW
PIN 1
INDICATOR
12 GND
11 RFOUT
10 RFOUT
9 GND
ADF5002

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