s71gl128nc0 Meet Spansion Inc., s71gl128nc0 Datasheet - Page 103

• Manufacturer Part Number: s71gl128nc0
• Description: Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 64 Megabit 4m X 16-bit Psram
• Manufacturer: Meet Spansion Inc.

Erase And Programming Performance
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V V
2. Under worst case conditions of 90°C, V
3. Effective write buffer specification is based upon a 16-word write buffer operation.
4. The typical chip programming time is considerably less than the maximum chip programming time listed, since most
5. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
6. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program
TSOP Pin and BGA Package Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
December 15, 2004 S29GLxxxN_MCP_A1
Parameter
Sector Erase Time
Chip Erase Time
Total Write Buffer
Programming Time
(Note 3)
Total Accelerated Effective
Write Buffer Programming
Time (Note 3)
Chip Program Time
Parameter Symbol
pattern.
words program faster than the maximum program times listed.
command. See
C
C
C
OUT
IN2
IN
Table 12
A
= 25°C, f = 1.0 MHz.
Parameter Description
Control Pin Capacitance
A d v a n c e
for further information on command definitions.
Output Capacitance
Input Capacitance
S29GL128N
S29GL256N
S29GL512N
S29GL128N
S29GL256N
S29GL512N
S29GLxxxN MirrorBit
CC
= 3.0 V, 100,000 cycles.
I n f o r m a t i o n
(Note 1)
Typ
128
256
240
200
123
246
492
0.5
64
V
V
V
OUT
IN
IN
TM
Flash Family
= 0
= 0
= 0
Test Setup
(Note 2)
1024
Max
256
512
3.5
TSOP
TSOP
TSOP
BGA
BGA
BGA
Unit
sec
sec
sec
CC
µs
µs
, 10,000 cycles, checkerboard
Typ
4.2
8.5
5.4
7.5
3.9
6
Excludes system level
programming prior to
overhead (Note 6)
erasure (Note 5)
Excludes 00h
Comments
Max
7.5
5.0
6.5
4.7
12
9
Unit
pF
pF
pF
pF
pF
pF
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