s71gl128nc0 Meet Spansion Inc., s71gl128nc0 Datasheet - Page 62

• Manufacturer Part Number: s71gl128nc0
• Description: Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 64 Megabit 4m X 16-bit Psram
• Manufacturer: Meet Spansion Inc.

Common Flash Memory Interface (CFI)
62
Write Protect (WP#)
Hardware Data Protection
The Write Protect function provides a hardware method of protecting the first or
last sector group without using V
by the WP#/ACC input.
If the system asserts V
erase functions in the first or last sector group independently of whether those
sector groups were protected or unprotected using the method described
vanced Sector Protection” section on page
when the device is in the standby mode, the maximum input load current is in-
creased. See the table in
If the system asserts V
whether the first or last sector was previously set to be protected or un-
protected using the method described in “Sector Group Protection and
Unprotection”. Note that WP# has an internal pullup; when uncon-
nected, WP# is at V
The command sequence requirement of unlock cycles for programming or erasing
provides data protection against inadvertent writes (refer to
mand definitions). In addition, the following hardware data protection measures
prevent accidental erasure or programming, which might otherwise be caused by
spurious system level signals during V
or from system noise.
Low V
When V
tects data during V
internal program/erase circuits are disabled, and the device resets to the read
mode. Subsequent writes are ignored until V
must provide the proper signals to the control pins to prevent unintentional writes
when V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or WE# do not initiate a write
cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# = V
V
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
commands on the rising edge of WE#. The internal state machine is automatically
reset to the read mode on power-up.
The Common Flash Interface (CFI) specification outlines device and host system
software interrogation handshake, which allows specific vendor-specified soft-
ware algorithms to be used for entire families of devices. Software support can
IH
. To initiate a write cycle, CE# and WE# must be a logical zero while OE# is a
CC
CC
CC
is less than V
is greater than V
Write Inhibit
IL
CC
and OE# = V
IH
power-up and power-down. The command register and all
IL
LKO
S29GLxxxN MirrorBit
.
on the WP#/ACC pin, the device disables program and
“DC Characteristics” section on page
, the device does not accept any write cycles. This pro-
LKO
IH
A d v a n c e
on the WP#/ACC pin, the device reverts to
.
ID
IH
. Write Protect is one of two functions provided
during power up, the device does not accept
CC
power-up and power-down transitions,
TM
55. Note that if WP#/ACC is at V
CC
Flash Family
I n f o r m a t i o n
is greater than V
IL
, CE# = V
Table 12
91.
LKO
. The system
IH
S29GLxxxN_MCP_A1 December 15, 2004
or WE# =
for com-
in“Ad-
IL