am41lv3204m Meet Spansion Inc., am41lv3204m Datasheet - Page 2

• Manufacturer Part Number: am41lv3204m
• Description: Stacked Multi-chip Package Mcp 32 Mbit 4 M ? 8 Bit/2 M ? 16-bit Flash Memory And 4 Mbit 512k ? 8-bit/256 K ? 16-bit Static Ram Preliminary
• Manufacturer: Meet Spansion Inc.

Am41LV3204M
Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash
Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
DISTINCTIVE CHARACTERISTICS
MCP Features
Flash Memory Features
ARCHITECTURAL ADVANTAGES
PERFORMANCE CHARACTERISTICS
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Power supply voltage of 2.7 to 3.3 volt
High Performance
— Access time as fast as 100ns initial 30 ns page Flash
Package
— 69-Ball FBGA
— 8 x 10 x 1.2 mm
Operating Temperature
— –40 C to +85 C
Single power supply operation
— 3 V for read, erase, and program operations
Manufactured on 0.23 µm MirrorBit process
technology
SecSi
— 128-word/256-byte sector for permanent, secure
— May be programmed and locked at the factory or by
Flexible sector architecture
— Sixty-three 32 Kword/64-kbyte sectors
— Eight 4 Kword/8-kbyte boot sectors
Compatibility with JEDEC standards
— Provides pinout and software compatibility for
Minimum 100,000 erase cycle guarantee per sector
20-year data retention at 125 C
High performance
— 100 ns access time
— 30 ns page read times
— 0.5 s typical sector erase time
— 15 µs typical write buffer word programming time:
70 ns SRAM
identification through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
the customer
single-power supply flash, and superior inadvertent
write protection
16-word/32-byte write buffer reduces overall
programming time for multiple-word updates
PRELIMINARY
(Secured Silicon) Sector region
Refer to AMD’s Website (www.amd.com) for the latest information.
SOFTWARE & HARDWARE FEATURES
SRAM Features
— 4-word/8-byte page read buffer
— 16-word/32-byte write buffer
Low power consumption (typical values at 3.0 V, 5
MHz)
— 30 mA typical initial Page read current; 10 mA typical
— 50 mA typical erase/program current
— 1 µA typical standby mode current
Software features
— Program Suspend & Resume: read other sectors
— Erase Suspend & Resume: read/program other
— Data# polling & toggle bits provide status
— Unlock Bypass Program command reduces overall
— CFI (Common Flash Interface) compliant: allows host
Hardware features
— Sector Group Protection: hardware-level method of
— Temporary Sector Unprotect: V
— WP#/ACC input:
— Hardware reset input (RESET#) resets device
Power dissipation
— Operating: 30 mA maximum
— Standby: 10 µA maximum
CE1s# and CE2s Chip Select
Power down features using CE1s# and CE2s
Data retention supply voltage: 1.5 to 3.3 volt
Byte data control: LB#s (DQ7–DQ0),
UB#s (DQ15–DQ8)
intra-Page read current
before programming operation is completed
sectors before an erase operation is completed
multiple-word programming time
system to identify and accommodate multiple flash
devices
preventing write operations within a sector group
changing code in locked sectors
Write Protect input (WP#) protects top or bottom two
sectors regardless of sector protection settings
ACC (high voltage) accelerates programming time for
higher throughput during system production
Publication# 30119
Issue Date: June 10, 2003
ID
-level method of
Rev: A Amendment/+1