am42dl1612d Meet Spansion Inc., am42dl1612d Datasheet - Page 120

• Manufacturer Part Number: am42dl1612d
• Description: 16 Mbit 2 M ? 8-bit/1 M ? 16-bit Cmos And 2 Mbit 128 K ? 16-bit Static Ram Preliminary
• Manufacturer: Meet Spansion Inc.

AC CHARACTERISTICS
Notes:
1. UB#s and LB#s controlled, CIOs must be high.
1. t
2. t
3. t
4. A write occurs during the overlap (t
February 6, 2004
asserting UB#s or LB#s for a single byte operation or simultaneously asserting UB#s and LB#s for a double byte operation. A
write ends at the earliest transition when CE1#s goes high and WE# goes high. The t
to the end of write.
CW
WR
AS
is measured from the address valid to the beginning of write.
is measured from the end of write to the address change. t
is measured from CE1#s going low to the end of write.
CE1#s
CE2s
Address
UB#s, LB#s
WE#
Data In
Data Out
Figure 32. SRAM Write Cycle—UB#s and LB#s Control
WP
) of low CE#1 and low WE#. A write begins when CE1#s goes low and WE# goes low when
High-Z
(See Note 4)
t
AS
Am42DL16x2D
WR
(See Note 2)
t
applied in case a write ends as CE1#s or WE# going high.
CW
t
t
AW
WC
(See Note 5)
t
t
CW
(See Note 2)
BW
t
WP
t
DW
Data Valid
WP
is measured from the beginning of write
t
WR
t
DH
(See Note 3)
High-Z
55