am42dl1612d Meet Spansion Inc., am42dl1612d Datasheet - Page 13
am42dl1612d
Manufacturer Part Number
am42dl1612d
Description
16 Mbit 2 M ? 8-bit/1 M ? 16-bit Cmos And 2 Mbit 128 K ? 16-bit Static Ram Preliminary
Manufacturer
Meet Spansion Inc.
Datasheet
1.AM42DL1612D.pdf
(128 pages)
- Current page: 13 of 128
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Legend: L = Logic Low = V
A
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
6. If WP#/ACC = V
February 6, 2004
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector Unprotect
(Note 5)
Temporary Sector
Unprotect
Read from SRAM
Write to SRAM
IN
If WP#/ACC = V
Block Protection and Unprotection” section.
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
= Address In, D
Table 1. Device Bus Operations—Flash Word Mode (CIOf = V
ACC
IL
IL
IN
, the two outermost boot sectors remain protected. If WP#/ACC = V
, the boot sectors will be protected. If WP#/ACC = V
= Data In, D
(9V), the program time will be reduced by 40%.
V
CE#f CE1#s CE2s OE# WE#
0.3 V
CC
IL
H
X
X
H
L
L
L
L
L
, CE1#s = V
IL
±
, H = Logic High = V
HH,
OUT
H
H
H
H
H
H
H
X
X
X
L
X
X
X
X
L
L
all sectors will be unprotected.
= Data Out
IL
and CE2s = V
X
X
X
H
X
X
X
X
H
H
L
L
L
L
L
L
L
IH
H
X
H
X
H
H
X
X
L
L
, V
IH
ID
Am42DL16x2D
at the same time.
H
X
H
X
X
H
= 8.5–12.5 V, V
L
L
L
L
A1 = H,
A6 = H,
A1 = H,
A6 = L,
A0 = L
A0 = L
Addr.
SA,
SA,
A
A
A
A
A
X
X
X
IN
IN
IN
IN
IN
IH
HH
LB#s UB#s RESET#
the boot sectors protection will be removed.
X
X
X
X
X
X
X
X
H
H
L
L
L
L
L
= 9.0 ± 0.5 V, X = Don’t Care, SA = Sector Address,
IH
H
H
X
X
X
X
L
X
X
X
X
L
L
L
L
), SRAM Word Mode (CIOs = V
IH
, the two outermost boot sector protection
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
±
WP#/ACC
(Note 4)
(Note 4)
(Note 6)
(Note 6)
L/H
L/H
L/H
L/H
H
X
X
High-Z
High-Z
High-Z
High-Z
High-Z
DQ7–
D
D
D
DQ0
D
D
D
D
D
D
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
CC
DQ15–
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
D
D
DQ0
)
D
D
D
OUT
X
X
OUT
OUT
IN
IN
IN
11
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