hb288032c5 Renesas Electronics Corporation., hb288032c5 Datasheet - Page 38

• Manufacturer Part Number: hb288032c5
• Description: Compactflash? 256 Mbyte/192 Mbyte/160 Mbyte/128 Mbyte 96 Mbyte/64 Mbyte/32 Mbyte
• Manufacturer: Renesas Electronics Corporation.

HB288256/192/160/128/096/064/032C5
9. Status register: This register is read only register, and it indicates the card status of command execution.
When this register is read in configured I/O card mode (INDEX = 1, 2, 3) and level interrupt mode, -IREQ is
negated. This register should be accessed in byte mode. In word mode, it is recommended that Alternate
status register may be used as this register.
bit7
BSY
bit
7
6
5
4
3
2
1
0
10. Alternate status register: This register is the same as Status register in physically, so the bit assignment
refers to previous item of Status register. But this register is different from Status register that -IREQ is not
negated when data read.
11. Command register: This register is write only register, and it is used for writing the command at
executing the drive operation. The command code written in the command register, after the parameter is
written in the Task File during the card is Ready state.
38
Name
BSY (BuSY)
DRDY (Drive ReaDY)
DWF (Drive Write Fault)
DSC (Drive Seek Complete)
DRQ (Data ReQuest)
CORR (CORRected data)
IDX (InDeX)
ERR (ERRor)
bit6
DRDY
bit5
DWF
bit4
DSC
Function
This bit is set when the card internal operation is executing. When
this bit is set to "1", other bits in this register are invalid.
If this bit and DSC bit are set to "1", the card is capable of receiving
the read or write or seek requests. If this bit is set to "0", the card
prohibits these requests.
This bit is set if this card indicates the write fault status.
This bit is set when the drive seek complete.
This bit is set when the information can be transferred between the
host and Data register. This bit is cleared when the card receives
the other command.
This bit is set when a correctable data error has been occurred and
the data has been corrected.
This bit is always set to "0".
This bit is set when the previous command has ended in some type
of error. The error information is set in the other Status register or
Error register. This bit is cleared by the next command.
bit3
DRQ
bit2
CORR
bit1
IDX
bit0
ERR