w86l488 Winbond Electronics Corp America, w86l488 Datasheet
w86l488
Available stocks
Related parts for w86l488
w86l488 Summary of contents
Page 1
... W86L488 Winbond Host Interface SD/SDIO/MMC Memory Card Bridge ...
Page 2
... W86L488 Data Sheet Revision History Pages Dates 1 08/2002 2 12/2002 P6, P8, P10, P11, P24, P25, P26, 3 03/2003 P41, P42, P43, P44, P45, P46 4 P30 05/2003 5 P36 06/2003 6 P36, P37 05/02/ Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this data sheet belong to their respective owners ...
Page 3
... Table of Content: 1. GENERAL DESCRIPTION ......................................................................................................... 1 2. FEATURES ................................................................................................................................. 1 3. PIN CONFIGURATIONS ............................................................................................................ 2 3.1 W86L488Y Pin Configuration ......................................................................................... 2 3.2 W86L488AY Pin Configuration....................................................................................... 3 4. PIN DESCRIPTIONS .................................................................................................................. 4 4.1 W86L488Y Pin Descriptions........................................................................................... 4 4.2 W86L488AY Pin Descriptions ........................................................................................ 7 5. BLOCK DIAGRAM .................................................................................................................... 11 5.1 W86L488Y Block Diagram ........................................................................................... 11 5.2 W86L488AY Block Diagram ......................................................................................... 12 6. REGISTER ................................................................................................................................ 13 6.1 W86L488Y Register...................................................................................................... 13 6.2 W86L488AY Register ................................................................................................... 16 7. FUCNTIONAL DESCRIPTION ................................................................................................. 19 7 ...
Page 4
... The data width of microprocessor 16-bits. W86L488 supports synchronous or asynchronous type of host interface. It also supports DMA and Interrupt type of transfer mode to improve data transfer performance. The signals on the SD bus are captured or driven by W86L488. W86L488 is monitored and controlled by microprocessor via internal registers. W86L488 fits for most of IA devices, such as PDA, Cellular Phone, DSC, and MP3 player ...
Page 5
... PIN CONFIGURATIONS 3.1 W86L488Y Pin Configuration A2 A1 XTYP2 D15/A0 D14 VSS VDDH D13 D12 D11 D10 D9 Fig. 3-1 W86L488Y Pin Assignment (48-pin QFN Publication Release Date: February 5, 2004 ...
Page 6
... W86L488AY Pin Configuration A2 A1 GIO7 XTYP2 GIO8 D15/A0 D14 VSS TEST VDDH GIO9 D13 D12 D11 D10 D9 Fig. 3-2 W86L488AY Pin Assignment (64-pin QFN ...
Page 7
... PIN DESCRIPTIONS 4.1 W86L488Y Pin Descriptions PIN NAME TYPE SD/SDIO/MMC Interface (VDD3 powered): 21 DAT0/CDO DO/DI 22 DAT1/IRQ DO/DI 15 DAT2 DO/DI 16 DAT3/CS DO/DI 17 CMD/CDI DO/DI 20 CLK DO Preliminary W86L488 DESCRIPTION SD/MMC mode: Data line bit 0 signal for SD/SDIO card, data signal for MMC card. SPI mode: Card data output in SPI mode. ...
Page 8
... W86L488Y Pin Descriptions, continued PIN NAME TYPE Crystal Driver (VDD3 powered): 13 XTI 14 XTO DO Host Interface Signal (VDDH powered): 28 HCKI 35 XCSN 36:38 A[3:1] 40 D15/A0 DI/DO 41 D14 DI/DO 44:48 D[13:9] DI/DO 1:5 D[8:4] DI/DO 7:10 D[3:0] DI/DO 33 XWRHN/ XBE0 34 XWRLN/ XBE1 11 XINTN DO DI Clock driver input signal, may be used as external clock input. Clock driver output signal. ...
Page 9
... W86L488Y Pin Descriptions, continued PIN NAME TYPE 32 XRDN/ XRWN 30 XASN 29 XDRQN/ DO XRDYN 39 XTYP2 General I/O Port Signal (VDD3 powered): 27:23 GIO[0:4] DI/DO Other Signal (VDDH powered): 12 RSTN DI Type 1: Read control pin, active low. Type 2: Read write control pin, 1: read 0: write DI Type 1: None. Type 2: Bus access cycle start pin, active low. ...
Page 10
... W86L488Y Pin Descriptions, continued Pin Name Type Power: 19 VDD3 DP 43 VDDH DP VSS 18, 31, 42 Type Power Digital Input Digital Output. Note*1: When Host I/F voltage is 2.5V, VDDH connects to 2.5V. When Host I/F voltage is 3.3V, VDDH connects to 4.2 W86L488AY Pin Descriptions PIN NAME TYPE ...
Page 11
... W86L488AY Pin Descriptions, continued PIN NAME TYPE ADAT3/ACS DO/DI 22 BDAT3/BCS 19 ACMD/ACDI DO/DI 23 BCMD/BCDI 20 26 ACLK DO BCLK 29 Crystal Driver (VDD3 powered): 16 XTI 17 XTO DO Host Interface Signal (VDDH powered): 38 HCKI 45 XCSN 47:50 A[4:1] 54 D15/A0 DI/DO 55 D14 DI/DO 60:64 D[13:9] DI/DO 1:5 D[8:4] DI/DO 9:12 D[3:0] DI/DO SD/MMC mode: Data line bit 3 or Card detect for SD/SDIO card. SPI mode: Card select ...
Page 12
... W86L488AY Pin Descriptions, continued Pin Name Type 43 XWRHN/ XBE0 44 XWRLN/ XBE1 42 XRDN/ XRWN 13 XINTN DO 40 XASN 39 XDRQN/ DO XRDYN 52 XTYP2 DI Type 1: High byte (D15 to D8) write control pin, active low. Type 2: High byte (D15 to D8) data valid pin, active low. DI Type 1: Low byte (D7 to D0) write control pin, active low. ...
Page 13
... W86L488AY Pin Descriptions, continued PIN NAME TYPE General I/O Port Signal: 46, GIO[5:0] DI/DO 32: GIO[11:6] DI/DO 59, 53, 51,37 Other Signal (VDDH powered): 14 RSTN 57 TEST Power: 25 VDD3 DP 58 VDDH DP 8, 24, VSS x4 DP 41, 56 Type Power Digital Input Digital Output. Note*2: When Host I/F voltage is 2.5V, VDDH connects to 2.5V. ...
Page 14
... Read XRDYN /Write XWRLN/XBE1 XWRHN/XBE0 Controller XRDN/XRWN A0 D[15:0]/ Data Packing D[7:0] Circuit XDRQN DMA Circuit XDAKN XINTN Fig. 5-1 Block Diagram of W86L488Y. Preliminary W86L488 XTYP2 RSTN Host I/F SD Bus Type Select Control Register File 17 Bytes Rsp Reg Serial to Parallel 6 Bytes or CMD Reg Parallel to Serial Serial to Parallel ...
Page 15
... A0 D[15:0]/ Data Packing D[7:0] Circuit XDRQN DMA Circuit XDAKN XINTN Fig. 5-2 Block Diagram of W86L488AY. Preliminary W86L488 VDDH XTYP2 RSTN Global Host I/F Sts & Ctrl Reg. Type Select ...
Page 16
... REGISTER The registers in the W86L488Y/AY are direct access registers and indirect access registers. The direct access registers and indirect access registers are listed as follows: 6.1 W86L488Y Register Addr Register Name Bit Bit Bit A[3:1] (note Direct Access Registers: Comman d Pipe Reg. ...
Page 17
... R/W) Master Data Format 0010 Register (R/W) 0 Master Block Count 0011 Register (R/W) 0 Slave Data Format 0100 Register (R/W) 0 Slave Block Count 0101 Register (R/W) 0 Nac Time-out 0110 Register (R/W) 0 0111 Error Status Reg. Preliminary W86L488 - - - - - GIO interrupt status ...
Page 18
... WO means the register is write only. Note 2: The data bit in the content is the initial value during hardware reset. 0: the bit value the bit value the bit value is unknow. -: Undefined bit in the register and the value will read 0. Preliminary W86L488 ...
Page 19
... W86L488AY Register Addr Register Name Bit A[4:1] (Note 1) 15 Global Registers: Global Status 1000 Reg. (RO) 0 Global Control 1001 Reg. (bit[9:8] 0 RO,R/W) Ready & Data 1010 - Size Register (R/W) Direct Access Registers: Command Pipe Reg. (WO) 0000 Response Reg. 0 (RO) Status Reg. 0001 (RO) 0 Control Reg. ...
Page 20
... Nac time out register Error status Publication Release Date: February 5, 2004 - 17 - Preliminary W86L488 - - - - - - GIO interrupt enable Index address Setting register ...
Page 21
... Undefined bit in the register and the value will read Buffer service length Test register Code register Publication Release Date: February 5, 2004 - 18 - Preliminary W86L488 Revision 0. ...
Page 22
... Fig. 7-2 High Byte and Low Byte Write Access in Host I/F Type 1. Preliminary W86L488 ...
Page 23
... Register bit [15:8] will be write. Fig. 7-4 CPU 8-bit Data Bus Write Access in Host I/F Type 1. Preliminary W86L488 ...
Page 24
... Fig. 7-6 Read and Write Timing in Host I/F Type 2, 2-Cycle Access. Preliminary W86L488 ...
Page 25
... Figure 7-8 is the waveform of Host access transmit data buffer in burst mode (DABST = high). System Clock A[3:1] D[15:0] XCSN XRDN XDRQN Fig. 7-7 Host Read Receive Data Buffer in Single Access Mode (DABST = low). Preliminary W86L488 010 Publication Release Date: February 5, 2004 - 22 - 010 Revision 0.82 ...
Page 26
... DRQ interrupt in, the XINTN pin will go low again at four system clock cycles later if any other interrupt event is still pending. System_ Clock A[3:1] D[15:0] XCSN XRDN XWRHN XINTN Preliminary W86L488 010 010 011 0x80XX Fig. 7-9 Timing of Interrupt in. Publication Release Date: February 5, 2004 - 23 - 010 011 1xxxxxxxb ...
Page 27
... There are two method for Host to detect SD/SDIO or MMC card inserting or removing through W86L488, the first method is detected by CD/DAT3 pin, the second method is a dedicate switch on the SD/MMC slot can be connected to the GIO0 pin and set GIO0 to input direction. These two methods can be performed even if the W86L488 is in power down state ...
Page 28
... Software reset is executed by write the RST bit of the control register to 1, all the internal logic will be reset to initial state and receive and transmit data buffer will be cleared, but the content of registers are not affected. In W86L488AY, the port A and port B will reset at the same time if global software reset in the global control register is set. ...
Page 29
... Power Supply (V = 3.3V) I VDD VDD (V = 3.3V) I VDD VDD = 3.3V and temperature = 25 GC and are for design aid only, not configured as power down mode, output without VDD VSS - 26 - Preliminary W86L488 RATING -0 VDD -65 to 150 RATING 2.5 to 3.6 VDDH 3.0 to 3.6 VDD3 2.7to 3.0 VDD3 ...
Page 30
... XTI rise time 5 XTI fall time 6 XTO delay time 7 XTI crystal driver 8 HCLK frequency 9 HCLK high pulse width 10 HCLK low pulse width 11 HCLK rise time 12 HCLK fall time Preliminary W86L488 CONDITION SYMBOL MIN. 2mA load V 0.9 OH 2mA sink V OL 3mA load V 0.9 ...
Page 31
... Address setup time 4 Address hold time 5 XRDYN delay time 6 XRDYN hold time 7 D[15:0] output delay time 8 D[15:0] output hold time 9 D[15:0] input setup time 10 D[15:0] input hold time Interrupt (figure 8-4) 1 Interrupt delay time 2 Interrupt hold time Preliminary W86L488 SYMBOL MIN. TYP. MAX. tRST acc ...
Page 32
... Fig. 8-1 Timing Characteristic of XTI, XTO and HCKI. SYMBOL MIN tSD3 5 d tSD3D 10 su tSD3 tSDn - d tSDn 10 su tSDn 5 h tXTI tXTI wh tXTO d tXTI f tHCKI tHCKI wh tHCKI tHCKI r f Publication Release Date: February 5, 2004 - 29 - Preliminary W86L488 TYP MAX UNITS NOTES - tXTI r wl Revision 0. ...
Page 33
... Publication Release Date: February 5, 2004 - 30 - Preliminary W86L488 ...
Page 34
... HCKI tIF2 su XCSN,XASN, XRWN,XBE[1:0] tA2 su A[3:1] tRDY XRDYN DI DO Fig. 8-5 Host Interface Type 2 Timing Characte CLK tCMD tCMD CMD (output) CMD (input) Fig. 8-6 Serial Interface CMD Timing Characteristic (SD Mode). Preliminary W86L488 tIF2 h tA2 h d tRDY ristic. tCMD ...
Page 35
... Fig. 8-9 Serial Interface DAT[3:0] Timing Characteristic (MMC Mode). Preliminary W86L488 tDAT ...
Page 36
... S MART@ W86L488Y 312AA01CSA 1st line: Winbond logo and SMART@IO Mark 2nd line: Part number of W86L488Y 3rd line: Tracking code 312: packages made in '03, week 12 A: assembly house ID; A means ASE, O means OSE, G means revision; A means version A, B means version B 01C: for internal use ...
Page 37
... PACKAGE DIMENSIONS 10.1 W86L488Y Package Dimensions 48- QFN 7x7 MM^2, Thickness: 1.0MM Öÿÿüú³×ü øü³Íàüÿÿü øø ½×Å¿½ØųÍÕ ³÷üø³ü ø³÷üùùøøöø ...
Page 38
... W86L488AY Package Dimensions 64- QFN 9x9 MM^2, Thickness: 1.0MM Preliminary W86L488 Publication Release Date: February 5, 2004 - 35 - Revision 0.82 ...
Page 39
... REFERENCE SCHEMATIC 11.1 W86L488Y Reference Schematic VCC3 C10 0. D10 D11 D12 D13 D14 D15 C11 0. RSTN VDD 43 39 VDD XTYP2 XTI XTO HCKI XINTN XCSN XRDN/XRDWRN ...
Page 40
... R28 22 DAT0 1 8 DAT1 2 7 INS VCC3 47K 47K 47K 47K 47K XDAKN HCKI GIO1 GIO2 GIO3 Preliminary W86L488 VCC3 R15 C7 C8 R18 47K 0.1u 10u 47K D D R21 open D CON1 9 DAT2 1 CD/DAT3 2 CMD 3 VSS 4 VDD 5 CLK 6 VSS ...
Page 41
... C23 C24 112 C24 114 116 118 120 122 124 C25 C26 126 C26 128 130 C27 C28 132 C28 134 136 138 140 D AMP 536280 Preliminary W86L488 VCC3 ...
Page 42
... W86L488AY Reference Schematic BWP 6 BGIO10 GIO11 7 BGIO11 8 VSS XINTN 13 XINTN RSTN 14 RSTN 15 NC XTI 16 XTI XTO BDAT2 BDAT3 BCMD ADAT2 ADAT3 ACMD VCC3 C3 0. GIO9 D13 D12 D11 ...
Page 43
... R46 47K R49 22 BDAT2 1 8 BDAT3 2 7 BCMD 3 6 BCLK 4 5 R54 22 BDAT0 1 8 BDAT1 2 7 BINS 3 6 BWP 4 5 Preliminary W86L488 JP1 R9 R10 1 47K 47K 2 HEADER 2 VCC3 R15 C7 C8 R18 47K 0.1u 10u 47K D D R21 open D CON1 9 DAT2 1 CD/DAT3 2 CMD ...
Page 44
... C23 C24 112 C24 114 116 118 120 122 124 C25 C26 126 C26 128 130 C27 C28 132 C28 134 136 138 140 D AMP 536280 Preliminary W86L488 VCC3 ...
Page 45
... Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 Publication Release Date: February 5, 2004 - 42 - Preliminary W86L488 Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No ...