mt18hvf25672pdy-800 Micron Semiconductor Products, mt18hvf25672pdy-800 Datasheet

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mt18hvf25672pdy-800

Manufacturer Part Number
mt18hvf25672pdy-800
Description
1gb, 2gb X72, Ecc, Dr 240-pin Ddr2 Sdram Vlp Rdimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 1:
DDR2 SDRAM Dual-Rank VLP RDIMM
MT18HVF12872(P)D – 1GB
MT18HVF25672(P)D – 2GB
For component data sheets, refer to Micron’s Web site:
Features
• Fits with ATCA form factor
• 240-pin, very low profile registered dual in-line
• Fast data transfer rates: PC2-3200, PC2-4200,
• 1GB (128 Meg x 72) or 2GB (256 Meg x 72)
• Supports ECC error detection and correction
• V
• V
• JEDEC-standard 1.8V I/O (SSTL_18-compatible)
• Differential data strobe (DQS, DQS#) option
• 4n-bit prefetch architecture
• Multiple internal device banks for concurrent
• Programmable CAS# latency (CL)
• Posted CAS# additive latency (AL)
• WRITE latency = READ latency - 1
• Programmable burst lengths: 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination (ODT)
• Serial presence-detect (SPD) with EEPROM
• Gold edge contacts
• Dual rank
PDF: 09005aef8286b286/Source: 09005aef8286b2d2
HVF18c128_256x72D.fm - Rev. A 4/07 EN
memory module (VLP RDIMM)
PC2-5300, or PC2-6400
operation
Speed
Grade
-80E
-800
-667
-53E
-40E
DD
DDSPD
= V
DD
= +1.7V to +3.6V
Q = +1.8V
Key Timing Parameters
Nomenclature
Industry
PC2-6400
PC2-6400
PC2-5300
PC2-4200
PC2-3200
t
CL = 6
CK
800
1GB, 2GB (x72, ECC, DR) 240-Pin DDR2 SDRAM VLP RDIMM
Data Rate (MT/s)
CL = 5
800
667
667
www.micron.com
1
CL = 4
533
533
533
533
400
Figure 1:
Notes: 1. Contact Micron for industrial temperature
Options
• Parity
• Operating temperature
• Package
• Frequency/CAS latency
• PCB height
– Commercial (0°C ≤ T
– Industrial (–40°C ≤ T
– 240-pin DIMM (Pb-free)
– 2.5ns @ CL = 5 (DDR2-800)
– 2.5ns @ CL = 6 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
– 3.75ns @ CL = 4 (DDR2-533)
– 5.0ns @ CL = 3 (DDR2-400)
– 17.9mm (0.70in)
PCB height 17.9mm (0.70in)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. CL = CAS (READ) latency; registered mode
CL = 3
400
400
400
module offerings.
will add one clock cycle to CL.
240-Pin VLP RDIMM
(ATCA Form Factor)
t
12.5
(ns)
RCD
15
15
15
15
A
A
1
2
≤ +85°C)
≤ +70°C)
©2007 Micron Technology, Inc. All rights reserved.
(ns)
12.5
t
15
15
15
15
RP
Marking
Features
-80E
-800
-667
-53E
-40E
D
P
T
Y
(ns)
t
55
55
55
55
55
RC

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mt18hvf25672pdy-800 Summary of contents

Page 1

... For component data sheets, refer to Micron’s Web site: Features • Fits with ATCA form factor • 240-pin, very low profile registered dual in-line memory module (VLP RDIMM) • Fast data transfer rates: PC2-3200, PC2-4200, PC2-5300, or PC2-6400 • 1GB (128 Meg x 72) or 2GB (256 Meg x 72) • ...

Page 2

... Refresh count Row address Device bank address Device page size per bank Device configuration Column address Module rank address Table 3: Part Numbers and Timing Parameters – 1GB Modules Base device: MT47H64M8 2 Part Number MT18HVF12872(P)D-80E__ MT18HVF12872(P)D-800__ MT18HVF12872(P)D-667__ MT18HVF12872(P)D-53E__ ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin VLP RDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ19 61 REF DQ0 33 DQ24 63 4 DQ1 ...

Page 4

... CB0–CB7 I/O Check bits. (SSTL_18) SDA I/O Serial presence-detect data: SDA is a bidirectional pin used to transfer addresses and (SSTL_18) data into and out of the presence-detect portion of the module Output Parity error found on the address and control bus (open drain) ...

Page 5

Table 6: Pin Descriptions (continued) Symbol Type NC – No connect: These pins should be left unconnected. RFU – Reserved for future use. PDF: 09005aef8286b286/Source: 09005aef8286b2d2 HVF18c128_256x72D.fm - Rev. A 4/07 EN 1GB, 2GB (x72, ECC, DR) 240-Pin DDR2 SDRAM ...

Page 6

Functional Block Diagram Figure 2: Functional Block Diagram RS1# RS0# DQS0 DQS0# DM0/DQS9 NC/DQS9# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1 DQS1# DM1/DQS10 NC/DQS10# DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2 DQS2# DM2/DQS11 NC/DQS11# DQ16 DQ17 ...

Page 7

... DDR2 SDRAM modules incorporate serial presence-detect (SPD). The SPD function is implemented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes are programmed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...

Page 8

... Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions above those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli- ability ...

Page 9

... HIGH HIGH between valid commands; Address bus inputs are stable during deselects; Data bus inputs are switching Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. ...

Page 10

... HIGH HIGH between valid commands; Address bus inputs are stable during deselects; Data bus inputs are switching Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. ...

Page 11

... Timing and switching specifications for the register listed above are critical for proper oper- ation of the DDR2 SDRAM registered DIMMs. These are meant subset of the param- eters for the specific device used on the module. Detailed information for this register is available in JEDEC standard JESD82. ...

Page 12

Table 12: PLL Specifications CU877 device or equivalent JESD82-8.18 Parameter Symbol DC high-level input V IH voltage DC low-level input V IL voltage V Input voltage (limits high-level input V IH voltage V DC low-level input IL voltage ...

Page 13

Serial Presence-Detect Table 14: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input ...

Page 14

... Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on SDRAM 4 Number of column addresses on SDRAM 5 DIMM height and module ranks 6 Module data width 7 Reserved 8 Module voltage interface levels t 9 SDRAM cycle time, CK (CL = MAX value, see byte 18) ...

Page 15

... Table 16: Serial Presence-Detect Matrix (continued) Byte Description 29 MIN RAS#-to-CAS# delay, 30 MIN active-to-precharge time, 31 Module rank density 32 Address and command setup time, 33 Address and command hold time, 34 Data/data mask input setup time, 35 Data/data mask input hold time Write recovery time, ...

Page 16

... Table 16: Serial Presence-Detect Matrix (continued) Byte Description 72 Manufacturing location 73–90 Module part number (ASCII) 91 PCB identification code 92 Identification code (continued) 93 Year of manufacture in BCD 94 Week of manufacture in BCD 95–98 Module serial number 99–127 Reserved for manufacturer-specific data 128–255 Reserved for customer-specific data Notes: 1 ...

Page 17

... TYP TYP. 63.0 (2.48) TYP 123.0 (4.84) TYP BACK VIEW U16 U18 U19 U17 70.68 (2.78) ® their respective owners. 17 Module Dimensions U10 U11 U12 18.00 (0.710) 17.80 (0.701) 10.0 (0.394) TYP PIN 120 55.0 (2.16) TYP U20 U21 U22 PIN 121 TYP Micron Technology, Inc., reserves the right to change products or specifications without notice. ...

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