mt16vddt6464ay-40b Micron Semiconductor Products, mt16vddt6464ay-40b Datasheet
mt16vddt6464ay-40b
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mt16vddt6464ay-40b Summary of contents
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... RCD and RP for -335 modules show 18ns to align with industry specifications; Micron Technology, Inc., reserves the right to change products or specifications without notice. 1 184-Pin UDIMM (MO-206 R ≤ +70°C) A ≤ +85° Contact Micron for industrial temperature module offerings ...
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... The data sheets for the base devices can be found on Micron’s Web site. 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Consult factory for current revision codes. Example: MT16VDDT6464AY-40BG4. PDF: 09005aef80739fa5/Source:09005aef807397e5 DD16C32_64_128_256x64A.fm - Rev. D 3/08 EN ...
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... The data sheets for the base devices can be found on Micron’s Web site. 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Consult factory for current revision codes. Example: MT16VDDT6464AY-40BG4. PDF: 09005aef80739fa5/Source:09005aef807397e5 DD16C32_64_128_256x64A.fm - Rev. D 3/08 EN ...
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DR) 184-Pin DDR SDRAM UDIMM Pin Assignments and Descriptions Table 7: Pin Assignments 184-Pin DDR UDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ17 47 REF 2 DQ0 25 DQS2 ...
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... V Supply SSTL_2 reference voltage (V REF V Supply Ground – No connect: These pins are not connected on the module. PDF: 09005aef80739fa5/Source:09005aef807397e5 DD16C32_64_128_256x64A.fm - Rev. D 3/08 EN Pin Assignments and Descriptions 2 C bus. /2). DD Micron Technology, Inc., reserves the right to change products or specifications without notice. 5 ©2004 Micron Technology, Inc. All rights reserved ...
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DR) 184-Pin DDR SDRAM UDIMM Functional Block Diagram Figure 2: Functional Block Diagram S1# S0# DQS0 DM0 DM CS# DQS DQ DQ0 DQ DQ1 DQ DQ2 DQ DQ3 DQ DQ4 DQ DQ5 DQ DQ6 DQ ...
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... READs and by the memory controller during WRITEs. DQS is edge-aligned with data for READs and center-aligned with data for WRITEs. DDR SDRAM modules operate from differential clock inputs (CK and CK#); the crossing of CK going HIGH and CK# going LOW will be referred to as the positive edge of CK. ...
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... Electrical Specifications Stresses greater than those listed in Table 9 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability ...
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... Micron encourages designers to simulate the signal characteristics of the system’s memory bus to ensure adequate signal integrity of the entire memory system. Power Operating voltages are specified at the DRAM, not at the edge connector of the module. Designers must account for any system voltage drops at anticipated power levels to ensure the required supply voltage is maintained. ...
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... (MIN); Address and control inputs change only during active READ or WRITE commands Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. PDF: 09005aef80739fa5/Source:09005aef807397e5 DD16C32_64_128_256x64A.fm - Rev. D 3/08 EN ...
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... (MIN); Address and control inputs change only during active READ or WRITE commands Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. PDF: 09005aef80739fa5/Source:09005aef807397e5 DD16C32_64_128_256x64A.fm - Rev. D 3/08 EN ...
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... (MIN); Address and control inputs change only during active READ or WRITE commands Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. PDF: 09005aef80739fa5/Source:09005aef807397e5 DD16C32_64_128_256x64A.fm - Rev. D 3/08 EN ...
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... Operating bank interleave read current: Four device bank interleaving reads ( with auto precharge; and control inputs change only during active READ or WRITE commands Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. ...
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DR) 184-Pin DDR SDRAM UDIMM Serial Presence-Detect Table 15: Serial Presence-Detect EEPROM DC Operating Conditions Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage: ...
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... TYP 1.02 (0.04) TYP 120.65 (4.75) TYP Back view U13 U14 U15 U16 64.77 (2.55) TYP tive owners. Micron Technology, Inc., reserves the right to change products or specifications without notice. 15 Module Dimensions U7 U8 31.9 (1.256) 31.6 (1.244) 17.78 (0.7) TYP Pin 92 U17 U18 10.0 (0.394) TYP Pin 93 3.8 (0.15) TYP ©2004 Micron Technology, Inc. All rights reserved. ...