k9f1g08u0m-y Samsung Semiconductor, Inc., k9f1g08u0m-y Datasheet - Page 31

• Manufacturer Part Number: k9f1g08u0m-y
• Description: 128m X 8 Bit / 64m X 16 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

K9F1G08Q0M
K9F1G08D0M
K9F1G08U0M K9F1G16U0M
Device Operation
PAGE READ
Upon initial device power up, the device defaults to Read mode. This operation is also initiated by writing 00h and 30h to the com-
mand register along with four address cycles. In two consecutive read operations, the second one doesn’t need 00h command, which
four address cycles and 30h command initiates that operation.Two types of operations are available : random read, serial page read
The random read mode is enabled when the page address is changed. The 2112 bytes(X8 device) or 1056 words(X16 device) of
data within the selected page are transferred to the data registers in less than 25 s(t
tion of this data transfer(tR) by analyzing the output of R/B pin. Once the data in a page is loaded into the data registers, they may be
read out in 50ns(1.8V device : 80ns) cycle time by sequentially pulsing RE. The repetitive high to low transitions of the RE clock make
the device output the data starting from the selected column address up to the last column address.
The device may output random data in a page instead of the consecutive sequential data by writing random data output command.
The column address of next data, which is going to be out, may be changed to the address which follows random data output com-
mand. Random data output can be operated multiple times regardless of how many times it is done in a page.
Figure 6. Read Operation
I/Ox
CLE
CE
WE
ALE
R/B
RE
00h
K9F1G16Q0M
K9F1G16D0M
Col Add1,2 & Row Add1,2
Address(4Cycle)
30h
Data Field
t
R
31
Spare Field
R
). The system controller can detect the comple-
Data Output(Serial Access)
FLASH MEMORY