mt9v011ia9stces aptina, mt9v011ia9stces Datasheet - Page 13

• Manufacturer Part Number: mt9v011ia9stces
• Description: Mt9v011 1/4-inch Vga Digital Image Sensor
• Manufacturer: aptina

Start Bit
Stop Bit
Slave Address
Data Bit Transfer
Acknowledge Bit
No-Acknowledge Bit
PDF:0560901182/Source 6061803135
MT9V011_IBGA_DS - Rev. C 6/10 EN
The start bit is defined as a HIGH-to-LOW transition of the data line while the clock line
is HIGH.
The stop bit is defined as a LOW-to-HIGH transition of the data line while the clock line
is HIGH.
The 8-bit address of a two-wire serial interface device consists of seven bits of address
and 1 bit of direction. A “0” in the LSB of the address indicates write mode, and a “1”
indicates read mode. The write address of the sensor is 0xBA, while the read address is
0xBB.
One data bit is transferred during each clock pulse. The two-wire serial interface clock
pulse is provided by the master. The data must be stable during the HIGH period of the
serial clock—it can only change when the two-wire serial interface clock is LOW. Data is
transferred eight bits at a time, followed by an acknowledge bit.
The master generates the acknowledge clock pulse. The transmitter (which is the master
when writing, or the slave when reading) releases the data line, and the receiver indi-
cates an acknowledge bit by pulling the data line low during the acknowledge clock
pulse.
The no-acknowledge bit is generated when the data line is not pulled down by the
receiver during the acknowledge clock pulse. A no-acknowledge bit is used to terminate
a read sequence.
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MT9V011 1/4-INCH VGA DIGITAL IMAGE SENSOR
Aptina reserves the right to change products or specifications without notice.
©2009 Aptina Imaging Corporation. All rights reserved.
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