ace24c32 ACE Technology Co., LTD., ace24c32 Datasheet - Page 9

• Manufacturer Part Number: ace24c32
• Description: Two-wire Serial Eeprom
• Manufacturer: ACE Technology Co., LTD.

Device Addressing
enable the chip for a read or write operation (refer to Figure 7).
significant bits as shown. This is common to all the EEPROM devices.
on the same bus. These bits must compare to their corresponding hard-wired input pins. The A2,A1 and
A0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are
allowed to float.
this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the
device will return to a standby state.
Noise protection:
device.
Date Security:
entire memory when the WP pin is at Vcc.
Write Operations
Byte Write:
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then
clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a
zero and the addressing device, such as a microcontroller, must terminate the write sequence with a
stop condition. At this time the EEPROM enters an internally timed write cycle, t
memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write
is complete (refer to Figure 8).
Page Write:
byte write, but the microcontroller does not send a stop condition after the first data word is clocked in.
Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can
transmit up to 31 more data words. The EEPROM will respond with a zero after each data word received.
The microcontroller must terminate the page write sequence with a stop condition (refer to Figure 9).
The higher data word address bits are not incremented, retaining the memory page row location. When
the word address, internally generated, reaches the page boundary, the following byte is placed at the
beginning of the same page. If more than 32 data words are transmitted to the EEPROM, the data
word address will “roll over” and previous data will be overwritten.
The 32K, 64K EEPROM devices all require an 8-bit device address word following a start condition to
The device address word consists of a mandatory one, zero sequence for the first four most
The 32/64K EEPROM use the three device address bits A2, A1, A0 to allow as many as eight devices
The eight bit of the device address is the read/write operation select bit. A read operation is initiated if
Special internal circuitry place on the SDA and SCL pins prevent small noise spikes from activating the
The ACE24C32/64 has a hardware data protection scheme that allows the user to write protect the
A write operation requires two 8-bit data word address following the device address word and
The 32K/64K EEPROM is capable of an 32-byte page write.A page write is initiated the same as a
The data word address lower five bits are internally incremented following the receipt of each data word.
Technology
Two-wire Serial EEPROM
ACE24C32/64
WR,
to the nonvolatile
VER 1.3
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