m366s3354bts-c7a Samsung Semiconductor, Inc., m366s3354bts-c7a Datasheet - Page 13

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m366s3354bts-c7a

Manufacturer Part Number
m366s3354bts-c7a
Description
Sdram Unbuffered Module 168pin Unbuffered Module Based On 512mb B-die 62/72-bit Non Ecc/ecc
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
(Recommended operating condition unless otherwise noted, T
(Recommended operating condition unless otherwise noted, T
M366S2953BTS (128M x 64, 1GB Module)
M374S6553ETS (64M x 72, 512MB Module)
Notes : 1. Measured with outputs open.
DC CHARACTERISTICS
256MB, 512MB, 1GB Unbuffered DIMM
Operating current
(One bank active)
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Operating current
(One bank active)
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
2. Refresh period is 64ms.
Parameter
Parameter
Symbol
Symbol
I
I
I
I
I
I
I
I
CC2
CC2
CC3
CC3
CC2
CC2
CC3
CC3
I
I
I
I
I
I
I
I
CC2
CC2
CC3
CC3
CC2
CC2
CC3
CC3
I
I
I
I
I
I
I
I
CC1
CC4
CC5
CC6
CC1
CC4
CC5
CC6
PS
NS
PS
NS
PS
NS
PS
NS
N
N
P
P
P
N
P
N
Burst length = 1
t
I
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
I
Page burst
4Banks activated
t
t
CKEd0.2V
Burst length = 1
t
I
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
I
Page burst
4Banks activated
t
t
CKEd0.2V
RC
O
O
CCD
RC
RC
O
O
CCD
RC
= 0 mA
= 0 mA
= 0 mA
= 0 mA
tt
tt
tt
tt
= 2CLKs
= 2CLKs
RC
RC
RC
RC
(min)
IL
IH
IH
IL
IH
IH
(min)
(min)
IL
IH
IH
IL
IH
IH
(min)
(max), t
(max), t
(max), t
(max), t
(min), CS tV
(min), CLK dV
(min), CS tV
(min), CLK dV
(min), CS tV
(min), CLK dV
(min), CS tV
(min), CLK dV
IL
IL
IL
IL
A
A
Test Condition
Test Condition
(max), t
(max), t
(max), t
(max), t
CC
CC
= 0 to 70qC)
CC
CC
= 0 to 70qC)
= 10ns
= 10ns
= 10ns
= 10ns
IH
IH
IH
IH
CC
CC
CC
CC
IL
IL
IL
IL
(min), t
(min), t
(min), t
(min), t
(max), t
(max), t
(max), t
(max), t
=f
=f
=f
=f
CC
CC
CC
CC
CC
CC
CC
CC
= 10ns
= 10ns
= 10ns
= 10ns
=f
=f
=f
=f
Rev. 1.1 February 2004
Version
Version
1,040
1,840
1,800
960
320
160
100
100
480
400
810
180
270
225
900
7A
7A
32
32
48
18
18
90
55
55
27
Unit
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
SDRAM
Note
Note
1
1
2
1
1
2

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