mk60dn512zvll10 Freescale Semiconductor, Inc, mk60dn512zvll10 Datasheet

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... Freescale Semiconductor Data Sheet: Advance Information K60 Sub-Family Data Sheet Supports the following: MK60DN256ZVLL10, MK60DX256ZVLL10, MK60DN512ZVLL10 Features • Operating Characteristics – Voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71 to 3.6 V – Temperature range (ambient): -40 to 105°C • Performance – 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1 ...

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... USB full-/low-speed On-the-Go controller with on-chip transceiver – Two Controller Area Network (CAN) modules – Three SPI modules – Two I2C modules – Five UART modules – Secure Digital host controller (SDHC) – I2S module K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 2 Preliminary Freescale Semiconductor, Inc. ...

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... Device clock specifications.................................21 5.2.2 General switching specifications.........................22 5.3 Thermal specifications.......................................................23 5.3.1 Thermal operating requirements.........................23 5.3.2 Thermal attributes...............................................23 K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Table of Contents 6 Peripheral operating requirements and behaviors....................24 6.1 Core modules....................................................................24 6.1.1 Debug trace timing specifications.......................24 6.1.2 JTAG electricals..................................................25 6.2 System modules................................................................28 6 ...

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... K60 Signal Multiplexing and Pin Assignments..................68 8.2 K60 Pinouts.......................................................................72 K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 Revision History........................................................................73 Preliminary Freescale Semiconductor, Inc. ...

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... Qualification status K## Kinetis family A Key attribute M Flash memory type K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K60 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • ...

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... MD = 144 MAPBGA ( mm) • 196 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Preliminary Values Freescale Semiconductor, Inc. ...

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... Digital I/O weak pullup/ WP pulldown current 3.3 Definition: Attribute An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. ...

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... Measured characteristic K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 8 Min. — 7 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Max. Unit pF Max. Unit V Freescale Semiconductor, Inc. ...

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... Typical values are provided as design guidelines and are neither tested nor guaranteed. 3.8.1 Example 1 This is an example of an operating behavior that includes a typical value: K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Normal Limited operating operating range ...

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... Symbol T Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 10 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

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... Description V Digital supply voltage DD I Digital supply current DD V Digital input voltage (except RESET, EXTAL, and XTAL) DIO K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. –55 — — Min. — Min. -2000 -500 -100 Table continues on the next page... ...

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... Table continues on the next page... Preliminary Min. Max. Unit –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — V — V 0.35 × 0.3 × — — mA Freescale Semiconductor, Inc. ...

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... V LVW4H V Low-voltage inhibit reset/recover hysteresis — HYSH high range V Falling low-voltage detect threshold — low range LVDL (LVDV=00) K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. -5 — -25 — 1.2 TBD through a ESD protection diode. There is no diode SS (=V -0.3V) is observed, then there is no need to provide current limiting ...

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... OL — = 3mA OL = 2mA — OL — = 0.6mA OL Table continues on the next page... Preliminary Max. Unit Notes 1 TBD V TBD V TBD V TBD V mV TBD V TBD μs Max. Unit Notes TBD V Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V Freescale Semiconductor, Inc. ...

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... RUN → VLLS2 → RUN • RUN → VLLS2 • VLLS2 → RUN RUN → VLLS3 → RUN • RUN → VLLS3 • VLLS3 → RUN K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. — — — — 20 ...

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... TBD — 35 — 15 Table continues on the next page... Preliminary Max. Unit Notes 4.1 μs 5.9 μs 4.1 μs 4.2 μs 4.1 μs 5.8 μs Max. Unit Notes TBD TBD mA TBD mA 3 TBD mA TBD mA 4 TBD mA TBD mA TBD mA TBD mA 2 TBD mA 5 Freescale Semiconductor, Inc. ...

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... The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See each module's specification for its supply current. K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. Max. ...

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... MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) • All peripheral clocks disabled except FTFL • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 18 Preliminary Freescale Semiconductor, Inc. ...

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... MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) • All peripheral clocks enabled but peripherals are not in active operation • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Preliminary General 19 ...

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... DD A OSC K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 20 Frequency Typ. band (MHz) 0.15–50 TBD 50–150 TBD 150–500 TBD 500–1000 TBD 0.15–1000 TBD = 96 MHz SYS Preliminary Unit Notes dBμ dBμV dBμV dBμV — Freescale Semiconductor, Inc. ...

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... Flash clock FLASH f LPTMR clock LPTMR f System and core clock SYS f Bus clock BUS K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Table 8. Capacitance attributes Min. Normal run mode — 20 TBD — — — — VLPR mode — ...

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... TBD — — TBD — — TBD Preliminary Unit Notes 2 MHz 1 MHz 25 MHz Unit Notes — Bus clock 1 cycles — — — — Bus clock cycles Freescale Semiconductor, Inc. ...

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... Single-layer (1s) R θJMA Four-layer (2s2p) R θJMA — R θJB — R θJC K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Description 100 LQFP Thermal TBD resistance, junction to ambient (natural convection) Thermal TBD resistance, junction to ambient (natural convection) Thermal TBD resistance, junction to ambient (200 ft ...

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... K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 24 Description 100 LQFP Thermal TBD characterization parameter, junction to package top outside center (natural convection) Table continues on the next page... Preliminary Unit Notes °C/W 4 Min. Max. Unit Frequency dependent MHz 2 — — ns — — Freescale Semiconductor, Inc. ...

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... TCLK rise and fall times J5 Boundary scan input data setup time to TCLK rise J6 Boundary scan input data hold time after TCLK rise K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Ts Th Table continues on the next page... Preliminary Min ...

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... Preliminary Max. Unit — ns — — ns — ns Max. Unit 3.6 V MHz — ns — ns — ns — — ns — — ns — ns 22.1 ns 22.1 ns — ns — ns Freescale Semiconductor, Inc. ...

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... TCLK (input) TCLK Data inputs Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 5. Test clock input timing Preliminary ...

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... There are no specifications necessary for the device's system modules. 6.3 Clock modules K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 28 J11 J12 J11 Figure 7. Test Access Port timing J14 Figure 8. TRST timing Preliminary J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

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... DCO output Low range (DRS=00) dco frequency range Mid range (DRS=01) Mid-high range (DRS=10) High range (DRS=11) K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 15. MCG specifications Min. — 32.768 31.25 — TBD — ...

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... MHz — MHz — MHz TBD ps TBD ps — — 100 MHz — µA 600 — µA — 4.0 MHz 120 — — ps — ps 600 — ps — ± 2.98 % — ± 5.97 % — 0. 1075( pll_ref Freescale Semiconductor, Inc ...

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... MHz (only RANGE=01) • 16 MHz • 24 MHz • 32 MHz C EXTAL load capacitance x C XTAL load capacitance y K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 1.71 — — 500 — 200 — ...

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... Unit Notes — — MΩ — MΩ — — MΩ 1 — MΩ — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz Freescale Semiconductor, Inc. 4 ...

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... Peak-to-peak amplitude of oscillation The EXTAL32 and XTAL32 pins should only be connected to required oscillator components and must not be connected to any other devices. K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. Max. 3 — ...

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... Table continues on the next page... Preliminary Max. Unit Notes — kHz — Max. Unit Notes TBD μs 100 ms 1 800 ms 1 Max. Unit Notes 1 μ μ μs 1 TBD μs Freescale Semiconductor, Inc. ...

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... KB EEPROM backup t eewr8b128k • 256 KB EEPROM backup t eewr8b256k t Word-write to erased FlexRAM location eewr16bers execution time K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — — — — ...

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... Table continues on the next page... Preliminary Max. Unit Notes TBD ms 1.5 ms TBD ms 2.5 ms TBD μs TBD ms 2.7 ms TBD ms 3.7 ms Typ. Unit 10 mA Max. Unit Notes 1 — years 2 — years 2 — years 2 — cycles 3 — years 2 — years 2 — years 2 Freescale Semiconductor, Inc. ...

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... The EEPROM endurance equation and graph shown below assume that only one configuration is ever used. EEPROM – 2 × EEESPLIT × EEESIZE Writes_subsystem = where K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min FlexRAM as EEPROM 5 ...

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... EEESIZE — allocated FlexRAM based on DEPART; entered with Program Partition command • Write_efficiency — • 0.25 for 8-bit writes to FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance nvmcycd Figure 9. EEPROM backup writes to FlexRAM K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 38 Preliminary Freescale Semiconductor, Inc. ...

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... FB_CLK. The FB_CLK frequency may be the same as the internal system bus frequency or an integer divider of that frequency. K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 ...

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... K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 40 Min. Max. 2.7 3.6 — — — 11.5 0.5 — 8.5 — 0.5 — Min. Max. 1.71 3.6 — TBD TBD — — 13.5 0 — 13.7 — 0.5 — Preliminary Unit Notes V MHz Unit Notes V MHz Freescale Semiconductor, Inc. ...

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... FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ ...

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... FB_TA FB_TSIZ[1:0] Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 42 FB3 Address Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Freescale Semiconductor, Inc. ...

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... ADCK f ADC conversion ≤ 13 bit modes ADCK clock frequency f ADC conversion 16 bit modes ADCK clock frequency K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 27 and Table 28 Min. 1 Typ. 1.71 — -100 ...

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... K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 44 Min. 1 Max. Typ. 20.000 — 818.330 37.037 — 461.467 = 1.0 MHz unless otherwise stated. Typical values are for ADCK ADIN ADIN Preliminary Unit Notes 6 Ksps 7 Ksps / AS ADIN ADIN ADIN ADIN ADIN Freescale Semiconductor, Inc. ...

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... ENOB Effective number 16 bit differential mode of bits • Avg=32 • Avg=1 16 bit single-ended mode • Avg=32 • Avg=1 K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = V REFH DDA 1 Min. Typ. 0.215 — 1.2 2 ...

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... DDA = 2.0 MHz unless otherwise stated. Typical values are for ADCK modes Preliminary = V ) (continued) SSA 2 Max. Unit Notes dB 5 TBD dB TBD dB 5 — dB — leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV Freescale Semiconductor, Inc. ...

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... Recommended ADC setting is: ADLSMP=1, ADLSTS MHz ADC clock. 7. ADC clock = 18 MHz, ADLSMP = 1, ADLST = 00, ADHSC = 1 8. ADC clock = 12 MHz, ADLSMP = 1, ADLST = 01, ADHSC = 1 K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. Typ. ...

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... VDDA 60Hz — 500mVpp, — 50Hz, VCM 100Hz TBD mV Output offset = V *(Gain+1) OFS 10 µs 5 TBD ppm/° 50°C TBD ppm/°C TBD ppm/° 50°C, ADC Averaging=32 TBD %/V V from 1.71 DDA to 3.6V TBD %/V Freescale Semiconductor, Inc. ...

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... Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong function of input common mode voltage (V 4. Gain = 2 PGAG 5. After changing the PGA gain setting, a minimum of 2 ADC+PGA conversions should be ignored. K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. I × ...

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... DD Preliminary Typ. Max. Unit — 3.6 V — 200 μA — 20 μA — — — — — — mV — — V — 0 200 ns 250 600 ns — 40 μs 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 2.5 2.8 3.1 51 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

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... The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV Calculated by a best fit curve from V K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — ...

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... Peripheral operating requirements and behaviors 6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C Figure 18. Typical INL error vs. digital code K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 54 Preliminary Freescale Semiconductor, Inc. ...

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... Table 35. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page... ...

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... Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 20 — TBD ppm/year — TBD µA — 1 — TBD — TBD — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. 1 ...

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... TXCLK pulse width high MII6 TXCLK pulse width low MII7 TXCLK to TXD[3:0], TXEN, TXER invalid MII8 TXCLK to TXD[3:0], TXEN, TXER valid K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — 35% 35 — ...

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... K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 58 MII6 MII5 MII8 MII7 Valid data Valid data Valid data MII2 MII1 MII3 MII4 Valid data Valid data Valid data Min. — 35% 35 — Preliminary Max. Unit 50 MHz 65% RMII_CLK period 65% RMII_CLK period — ns — ns — Freescale Semiconductor, Inc. ...

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... Maximum load current — Standby mode LOADstby V Regulator output voltage — Input supply Reg33out (VREGIN) > 3.6 V • Run mode • Standby mode K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. TBD 0 14.25 0.25 Min ...

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... BUS (t / SCK SCK/ − — BUS − — BUS 4 — — 15 — 0 — Preliminary Unit Notes V 1 μF mΩ Load Unit Notes V 1 MHz Freescale Semiconductor, Inc. ...

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... DSPI_SS inactive to DSPI_SOUT not driven DSPI_SS DSPI_SCK (CPOL=0) DSPI_SOUT DS13 DSPI_SIN Figure 25. DSPI classic SPI timing — slave mode K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS1 DS2 DS8 Data Last data First data DS5 ...

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... BUS 2 — −2 TBD 0 DS1 DS2 DS8 Data Last data First data DS5 DS6 First data Data Last data Preliminary Max. Unit Notes 3 MHz — / SCK — — 8.5 ns — ns — ns — ns DS4 Freescale Semiconductor, Inc. ...

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... C switching specifications See General switching specifications. 6.8.9 UART switching specifications See General switching specifications. K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 First data Data Preliminary Min ...

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... K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 64 Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 28. SDHC timing Preliminary Min. Max. Unit 2.7 3 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — — 6 — — ns Freescale Semiconductor, Inc. ...

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... I2S_MCLK (output) I2S_BCLK (output I2S_FS (output) I2S_FS (input) S7 I2S_TXD I2S_RXD Figure 29. I K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors master (clocks driven) and slave 2 S master mode timing ...

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... Table continues on the next page... Preliminary Min. Max. Unit 2.7 3 — ns SYS 45% 55% MCLK period 10 — — ns — — — — ns S16 S14 S16 Typ. Max. Unit Notes — 3 500 pF 5.5 TBD MHz 0.5 TBD MHz Freescale Semiconductor, Inc ...

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... Data is captured with an average of 7 periods window. 7 Dimensions 7.1 Obtaining package dimensions Package dimensions are provided in package drawings. To find a package drawing search for the drawing’s document number: K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. TBD 1 TBD 600 — ...

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... ALT1 ALT2 ALT3 ALT4 SPI1_PCS1 UART1_TX SDHC0_D1 SPI1_SOUT UART1_RX SDHC0_D0 SPI1_SCK UART1_CTS SDHC0_DCL _b K SPI1_SIN UART1_RTS SDHC0_CM _b D PTE4 SPI1_PCS0 UART3_TX SDHC0_D3 PTE5 SPI1_PCS2 UART3_RX SDHC0_D2 PTE6 SPI1_PCS3 UART3_CTS I2S0_MCLK _b Preliminary ALT5 ALT6 ALT7 EzPort I2C1_SDA I2C1_SCL I2S0_CLKIN Freescale Semiconductor, Inc. ...

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... VDD VDD VDD 41 VSS VSS VSS 42 PTA12 CMP2_IN0 CMP2_IN0 43 PTA13 CMP2_IN1 CMP2_IN1 44 PTA14 DISABLED K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 CAN1_TX UART4_TX CAN1_RX UART4_RX PTE26 UART4_CTS ENET_1588 _b _CLKIN PTA0 UART0_CTS FTM0_CH5 _b PTA1 ...

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... PTC0 SPI0_PCS4 PDB0_EXTR I2S0_TXD G Preliminary ALT5 ALT6 ALT7 EzPort I2S0_RXD I2S0_RX_FS I2S0_MCLK I2S0_CLKIN LPT0_ALT1 FTM1_QD_P HA FTM1_QD_P HB FTM0_FLT3 FTM0_FLT0 FB_AD20 FB_AD19 FTM0_FLT1 FB_AD18 FTM0_FLT2 FB_AD17 EWM_IN FB_AD16 EWM_OUT_ b FB_AD15 FTM2_QD_P HA FTM2_QD_P HB FB_AD31 CMP0_OUT FB_AD30 CMP1_OUT FB_AD29 CMP2_OUT FB_AD28 FB_AD14 Freescale Semiconductor, Inc. ...

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... PTC14 87 PTC15 88 VSS VSS VSS 89 VDD VDD VDD 90 PTC16 91 PTC17 92 PTC18 93 PTD0 K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTC1 SPI0_PCS3 UART1_RTS FTM0_CH0 _b PTC2 SPI0_PCS2 UART1_CTS FTM0_CH1 _b PTC3 SPI0_PCS1 UART1_RX FTM0_CH2 PTC4 SPI0_PCS0 ...

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... ALT4 SPI0_SCK UART2_CTS _b PTD2 SPI0_SOUT UART2_RX PTD3 SPI0_SIN UART2_TX PTD4 SPI0_PCS1 UART0_RTS FTM0_CH4 _b SPI0_PCS2 UART0_CTS FTM0_CH5 _b SPI0_PCS3 UART0_RX FTM0_CH6 PTD7 CMT_IRO UART0_TX FTM0_CH7 Preliminary ALT5 ALT6 ALT7 EzPort FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN FB_AD1 EWM_OUT_ b FB_AD0 FTM0_FLT0 FTM0_FLT1 Freescale Semiconductor, Inc. ...

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... The following table provides a revision history for this document. Rev. No. Date Substantial Changes 1 11/2010 Initial public revision K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Table 50. Revision History Table continues on the next page... Preliminary Revision History VDD 75 74 ...

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... K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 74 footnote in "Voltage and Current Operating Requirements" table. IC spec in "Power consumption operating behaviors" table DD_VBAT description and specs in "USB VREG electrical specifications" table LIM Preliminary Freescale Semiconductor, Inc. ...

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... For further information, see http://www.freescale.com or contact your Freescale sales representative. For information on Freescale's Environmental Products program http://www.freescale.com/epp. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010–2011 Freescale Semiconductor, Inc. ...