adv476 Analog Devices, Inc., adv476 Datasheet
adv476
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adv476 Summary of contents
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... CMOS Monolithic 256 18 Color Palette RAM-DAC FUNCTIONAL BLOCK DIAGRAM The ADV476 is fabricated CMOS process. Its mono- lithic CMOS construction ensures greater functionality with low power dissipation and small board area. The part is packaged in a 0.6", 28-pin DIP and a 44-pin PLCC. ...
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... ADV476–SPECIFICATIONS Parameter STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Full Scale Error Blank Level Offset Error DIGITAL INPUTS Input High Voltage, V INH Input Low Voltage, V INL Input Current Input Current (RD Input Only) Input Capacitance DIGITAL OUTPUTS ...
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... Figure 1. MPU Read/Write Timing Figure 2. Video Input/Output Timing –3– ADV476 MIN MAX Units Conditions/Comments MHz Clock Rate ns min RS0, RS1 Setup Time ns min RS0, RS1 Hold Time ns min RD Asserted to Data Bus Driven ns max ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADV476 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... The maximum positive polarity amplitude of the video signal. Video Signal That portion of the composite video signal which varies in gray scale levels between Reference White and Reference Black. Also referred to as the picture signal, this is the portion which may be visually observed. –5– ADV476 ...
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... ADV476 MPU Interface As illustrated in the functional block diagram, the ADV476 sup- ports a standard MPU bus interface, allowing the MPU direct access to the color palette RAM. The RS0 and RS1 control inputs specify whether the MPU is accessing the address register or the color palette RAM, as shown in Table I ...
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... FFH Color Palette RAM Location FFH Pixel Read Mask Register The Pixel Read Mask Register in the ADV476 can be used to implement register level pixel processing, thereby cutting down on software overhead. This is achieved by gating the input pixel stream (P0–P7) with the contents of the pixel read mask regis- ter ...
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... Typical with full Scale RED, GREEN, BLUE = 19.05 mA. I Reference Input The ADV476 requires an active current reference to enable the DACs provide stable and accurate video output levels. The rela- tionship between the output voltage and the required input ref- erence current is given by: ...
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... PCB power plane and not the analog power plane. Analog Signal Interconnect The ADV476 should be located as close as possible to the out- put connectors thus minimizing noise pickup and reflections due to impedance mismatch. The video output signals should overlay the ground plane, and not the analog power plane, thereby maximizing the high fre- quency power supply rejection ...
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... ADV476 Figure 7. ADV476 Typical Connection Diagram and Component List Figure 8. Connection of V REF with the ADV476KP (44-Pin PLCC) and COMP –10– OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Pin Plastic DIP (N-28) REV. B ...
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... ADV476 –12– REV. B ...