km29w32000ait Samsung Semiconductor, Inc., km29w32000ait Datasheet - Page 3

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km29w32000ait

Manufacturer Part Number
km29w32000ait
Description
8-bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
Figure 1. FUNCTIONAL BLOCK DIAGRAM
Figure 2. ARRAY ORGANIZATION
KM29W32000AT, KM29W32000AIT
32M : 8K Row
(=512 Block)
V
V
CC
SS
NOTE : Column Address : Starting Address of the Register.
2nd Cycle
1st Cycle
3rd Cycle
CE
RE
WE
00H Command(Read) : Defines the starting Address of the 1st half of the Register.
01H Command(Read) : Defines the sarting Address of the 2nd half of the Register.
* A
* X can be High or Low.
Command
8
A
A
is initially set to "Low" or "High" by the 00H or 01H Command.
9
0
1st half Page Register
(=256 Bytes)
- A
- A
I/O 0
21
7
A
A
A
17
0
9
512B Column
Page Register
& High Voltage
CLE ALE WP
I/O 1
Control Logic
512Byte
A
A
A
Command
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Generator
10
18
1
Register
2nd half Page Register
(=256 Bytes)
A
I/O 2
A
A
A
8
11
19
2
I/O 3
A
A
A
16B Column
16Byte
12
20
3
3
I/O 4
A
A
A
13
21
4
I/O 0 ~ I/O 7
2nd half Page Register & S/A
1st half Page Register & S/A
Global Buffers
I/O 5
A
(512 + 16)Byte x 8192
A
*X
I/O Buffers & Latches
14
5
8 bit
32M + 1M Bit
NAND Flash
Y-Gating
Y-Gating
ARRAY
1 Block(=16 Row)
(8K + 256) Byte
I/O 6
1 Page = 528 Bytes
1 Block = 528 B x 16 Pages
1 Device = 528B x 16Pages x 512 Blocks
A
A
*X
15
6
= (8K + 256) Bytes
= 33 Mbits
I/O 7
A
A
*X
16
7
FLASH MEMORY
Output
Driver
Column Address
Row Address
(Page Address)
V
V
CC
SS
I/0 0
I/0 7
Q

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