gal6001 Lattice Semiconductor Corp., gal6001 Datasheet - Page 11

• Manufacturer Part Number: gal6001
• Description: High Performance E2 Cmos Fpla Generic Array Logic?
• Manufacturer: Lattice Semiconductor Corp.

Note: fmax with external feedback is calculated from measured
tsu and tco.
Note: fmax with no feedback may be less than 1/(twh + twl). This
is to allow for a clock duty cycle of other than 50%.
3-state levels are measured 0.5V from steady-state active
level.
Output Load Conditions (see figure)
fmax Descriptions
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
Test Condition
A
B
C
Active High
Active Low
Active High
Active Low
f
max with External Feedback 1/(
LOGIC
ARRAY
LOGIC
ARRAY
f
t
max with No Feedback
su
300
300
300
R
1
REGISTER
REGISTER
CLK
CLK
390
390
390
390
390
R
3ns 10% – 90%
2
t
GND to 3.0V
t
See Figure
su+
co
1.5V
1.5V
t
co)
50pF
50pF
50pF
5pF
5pF
C
L
11
Note: tcf is a calculated value, derived by subtracting tsu from
the period of fmax w/internal feedback (tcf = 1/fmax - tsu). The
value of tcf is used primarily when calculating the delay from
clocking a register to a combinatorial output (through registered
feedback), as shown above. For example, the timing from clock
to a combinatorial output is equal to tcf + tpd.
FROM OUTPUT (O/Q)
UNDER TEST
*C
f
L
max with Internal Feedback 1/(
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
Specifications GAL6001
LOGIC
ARRAY
R
2
t
cf
t
+5V
pd
REGISTER
CLK
R
1
t
su+
C *
L
t
TEST POINT
cf)