M25P10-AVMB3/X NUMONYX [Numonyx B.V], M25P10-AVMB3/X Datasheet - Page 15

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M25P10-AVMB3/X

Manufacturer Part Number
M25P10-AVMB3/X
Description
1 Mbit, serial Flash memory, 50 MHz SPI bus interface
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
M25P10-A
5
Memory organization
The memory is organized as:
Each page can be individually programmed (bits are programmed from 1 to 0). The device is
sector or bulk erasable (bits are erased from 0 to 1) but not page erasable.
Table 3.
Figure 6.
HOLD
W
131,072 bytes (8 bits each)
4 sectors (256 Kbits, 32768 bytes each)
512 pages (256 bytes each).
C
D
Q
S
Sector
3
2
1
0
Memory organization
Block diagram
Address Register
Control Logic
and Counter
18000h
10000h
08000h
00000h
18000h
10000h
08000h
00000h
I/O Shift Register
256 bytes (page size)
High Voltage
Generator
X Decoder
Data Buffer
256 byte
Address range
1FFFFh
000FFh
Memory organization
1FFFFh
17FFFh
0FFFFh
07FFFh
Register
Status
15/51

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